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BTM7810K

BTM7810K DataSheet Infineon Technologies AG TrilithIC

TrilithIC

Infineon Technologies

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BTM7810K

Data Sheet, Rev. 1.0, May 2008
BTM7810K
TrilithIC
Automotive Power
BTM7810K
Table of Contents
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1 2 2.1 2.2 3 4 4.1 4.2 4.3 4.4 4.5 4.6 4.7 5 5.1 5.2 5.3 5.4 6 7 8 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Terms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Short Circuit Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Overtemperature Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Undervoltage Lockout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Open Load Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Status Flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 8 8 8 8 8 8 9
10 10 11 11 12
Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Data Sheet
2
Rev. 1.0, 2008-05-15
TrilithIC
BTM7810K
1
Features * * * *
Overview
Quad D-MOS switch Free configurable as bridge or quad-switch Optimized for DC motor management applications Low RDS ON High side: 26 m typ. @ 25C, 65 m max. @ 110C Low side: 14m typ. @ 25C, 28 m max. @ 110C Maximum peak current: typ. 42 A @ 25 C Very low quiescent current: typ. 4 A @ 25 C Thermally optimized power package Operates up to 40 V Load and GND-short-circuit-protection Overtemperature shut down with hysteresis Undervoltage detection with hysteresis Open load detection in OFF mode Status flag for overtemperature Internal clamp diodes Isolated sources for external current sensing Green Product (RoHS compliant) AEC Qualified
* * * * * * * * * * * * *
PG-TO263-15-1
Description The BTM7810K is part of the TrilithIC family containing three dies in one package: One double high-side switch and two low-side switches. The drains of these three vertical DMOS chips are mounted on separated lead frames. The sources are connected to individual pins, so the BTM7810K can be used in H-bridge- as well as in any other configuration. The double high-side switch is manufactured in SMART SIPMOS(R) technology which combines low RDS ON vertical DMOS power stages with CMOS circuitry for control, protection and diagnosis. To achieve low RDS ON and fast switching performance, the low-side switches are manufactured in S-FET logic level technology.
Type BTM7810K Data Sheet
Package PG-TO263-15-1 3
Marking BTM7810K Rev. 1.0, 2008-05-15
BTM7810K
Description
2
2.1
Pin Configuration
Pin Assignment
Molding Compound NC SL1 IL1 NC IH1 ST1 SH1 DHVS GND IH2 ST2 SH2 IL2 SL2 NC 1 Heat-Slug 1 2 18 3 4 5 Heat-Slug 2 6 7 8 9 10 11 12 Heat-Slug 3 13 16 14 15 DL2 17 DHVS DL1
Figure 1
Pin Assignment BTM7810K (Top View)
Data Sheet
4
Rev. 1.0, 2008-05-15
BTM7810K
Description
Table 1 Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
Pin Definitions and Functions Symbol Function NC SL1 IL1 NC IH1 ST1 SH1 DHVS GND IH2 ST2 SH2 IL2 SL2 NC DL2 DHVS DL1 Not connected Source of low-side switch 1 Analog input of low-side switch 1 Not connected Digital input of high-side switch 1 Status of high-side switch 1; open Drain output Source of high-side switch 1 Drain of high-side switches and power supply voltage Ground of high-side switches Digital input of high-side switch 2 Status of high-side switch 2; open Drain output Source of high-side switch 2 Analog input of low-side switch 2 Source of low-side switch 2 Not connected Drain of low-side switch 2 Heat-Slug 3 Drain of high-side switches and power supply voltage Heat-Slug 2 Drain of low-side switch 1 Heat-Slug 1
Pins written in bold type need power wiring.
Data Sheet
5
Rev. 1.0, 2008-05-15
BTM7810K
Description
2.2
Terms
IS
VS CS 470nF CL 100F
IFH1,2 IST LK1 IST1 ST1
6
DHVS
8, 17
VDSH2 IST LK2 IST2 VST1 VSTL1 VSTZ1 VST2 VSTL2 VSTZ2 VIH1 VIH2 IIH1 IH2 GND IGND ILKCL
10
VDSH1 -VFH1
-VFH2 ST2
11
Diagnosis
Biasing and Protection
IIH1
IH1
5
Gate Driver RO1 Gate Driver RO2
16 12
SH2 DL2
ISH2 IDL2 IDL LK 2 VUVON VUVOFF
6
7 18
SH1 DL1
ISH1 IDL1 IDL LK 1
IIL1
IL1
3
VIL1 VIL th 1
IIL2
IL2
13
VIL2 VIL th 2
2
14
VDSL1 -VFL1
VDSL2 -VFL2
SL1 ISCP L 1 ISL1
SL2 ISCP L 2 ISL2
Figure 2 Table 2
Terms BTM7810K
HS-Source-Current
Named during Short Circuit
Named during Leakage-Cond.
ISH1,2
ISCP H
IDL LK
Data Sheet
6
Rev. 1.0, 2008-05-15
BTM7810K
Description
3
Block Diagram
DHVS
6 8, 17
ST1
ST2
11
Diagnosis
Biasing and Protection
IH1
5
IH2 GND
10
Driver IN OUT 00LL 01LH 10HL 11HH
RO1
RO2
16
12
SH2 DL2
9
7 18
SH1 DL1
3
IL1
13
IL2
2
14
SL1
SL2
Figure 3
Block Diagram BTM7810K
Data Sheet
7
Rev. 1.0, 2008-05-15
BTM7810K
4
4.1
Circuit Description
Input Circuit
The control inputs IH1,2 consist of TTL/CMOS compatible Schmitt-Triggers with hysteresis. Buffer amplifiers are driven by these stages and convert the logic signal into the necessary form for driving the power output stages. The inputs are protected by ESD clamp-diodes. The inputs IL1 and IL2 are connected to the gates of the standard N-channel vertical power-MOS-FETs.
4.2
Output Stages
The output stages consist of an low RDSON Power-MOS H-bridge. In H-bridge configuration, the D-MOS body diodes can be used for freewheeling when communicating inductive loads. If the high-side switches are used as single switches, positive and negative voltage spikes which occur when driving inductive loads are limited by integrated power clamp diodes.
4.3
Short Circuit Protection
The outputs are protected against short circuit to ground and short circuit over load. In short circuit to ground and short circuit over load situation the HS switches will limit the load current. Due to the high power dissipation in short circuit situation the junction temperature will rise. The over temperature protection function will switch off the output transistors if the junction temperature reaches the over temperature shutdown limit.
4.4
Overtemperature Protection
The high-side switches also incorporate an over temperature protection circuit with hysteresis which switches off the output transistors and sets the status output to low.
4.5
Undervoltage Lockout
When VS reaches the switch-on voltage VUVON the IC becomes active with a hysteresis. The high-side output transistors are switched off if the supply voltage VS drops below the switch off value VUVOFF.
4.6
Open Load Detection
The open load detection of the BTM7810K works in OFF condition and is based on a voltage measurement at the source of the high side switch. In order to use the open load detection SH2 has to be connected to Vcc via a pull up resistor. Because this pull up resistor would connect the bridge output to the C supply it needs to be disconnected whenever the high side switch is on. This can be done by a transistor as shown in the application example (Figure 4 "Application Example BTM7810K" on Page 15). To check for open load: * * * Set IH1 = IH2 = LOW (both high side switches off) Set IL2 = LOW, IL1 = HIGH (only low side switch 1 is on) Connect Rol (open load pull up) to 5V via transistor
If the load is connected properly it will pull down the voltage at SH2 to a value close to 0V. If the load is disconnected the resistor will pull the voltage at SH2 to value close to Vcc. If the voltage at SH2 is higher than the open load detection voltage VOUT(OL) then ST will be pulled down.
Data Sheet
8
Rev. 1.0, 2008-05-15
BTM7810K
4.7
Status Flag
The status flag outputs are open drain outputs with zener-diode which require a pull-up resistor, as shown in the application circuit in Figure 4 "Application Example BTM7810K" on Page 15. Various errors as listed in the table "Diagnosis" are reported by switching the open drain output ST to low. Table 3 Flag Truthtable and Diagnosis (valid only for the High-Side-Switches) IH1 0 0 1 1 0 1 X X 0 1 X X 0 0 1 1 X IH2 0 1 0 1 X X 0 1 X X 0 1 0 1 0 1 X SH1 SH2 ST1 Outputs L L H H Z H X X L L X X L L L L L L H L H X X Z H X X L L L L L L L 1 1 1 1 0 1 1 1 1 0 1 1 1 1 0 0 1 1 1 1 1 1 1 0 1 1 1 1 0 1 0 1 0 1 stand-by mode switch2 active switch1 active both switches active detected detected ST2 Remarks Inputs Normal operation; identical with functional truth table Open load at high-side switch 1 Open load at high-side switch 2 Overtemperature high-side switch1 Overtemperature high-side switch2 Overtemperature both high-side switches
detected detected detected detected detected not detected
Undervoltage
Note: * multiple simultaneous errors are not shown in this table
Inputs: 0 = Logic LOW 1 = Logic HIGH X = don't care -
Outputs: Z = Output in tristate condition L = Output in sink condition H = Output in source condition X = Voltage level undefined
Status: 1 = No error 0 = Error - -
Data Sheet
9
Rev. 1.0, 2008-05-15
BTM7810K
5
5.1
Electrical Characteristics
Absolute Maximum Ratings
Absolute Maximum Ratings1) -40 C < Tj < 110 C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values min. High-Side-Switches (Pins DHVS, IH1,2 and SH1,2) 5.1.1 5.1.2 5.1.3 5.1.4 5.1.5 5.1.6 5.1.7 5.1.8 5.1.9 5.1.10 5.1.11 5.1.12 5.1.13 5.1.14 5.1.15 5.1.16 5.1.17 5.1.18
1) 2) 3) 4)
Unit Remarks
max. 42 28
3)
Supply voltage Supply voltage for full short circuit protection HS-drain current2) HS-input current HS-input voltage Status pull up voltage Status Output current Drain-Source-Clamp voltage LS-drain current2)
VS VS(SCP) IS IIH VIH VST IST VDSL IDL
- 0.3 - - 14 -5 - 10 - 0.3 -5 55 - 21 - -
V V A mA V V mA V A A A V C C kV kV kV kV
-
TA = 25C; tP < 100 ms
Pin IH1 and IH2 Pin IH1 and IH2
5 16 5.4 5 - 26 42 67 20 110 150 0.5 1 2 4
Status Output ST Pin ST1 or ST2
Low-Side-Switches (Pins DL1,2, IL1,2 and SL1,2)
VIL = 0 V; ID  1 mA Tj = 25C TA = 25C; tP < 100 ms TA = 25C; tP < 10 ms TA = 25C; tP < 1 ms
Pin IL1 and IL2 - -
LS-input voltage Junction temperature Storage temperature
4)
VIL Tj Tstg VESD VESD VESD VESD
- 20 - 40 - 55 - - - -
Temperatures
ESD Protection
Input LS-Switch Input HS-Switch Status HS-Switch Output LS and HS-Switch
all other pins connected to Ground
Not subject to production test; specified by design Single pulse Internally limited ESD susceptibility HBM according to EIA/JESD22-A114-B (1.5k, 100pF)
Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not designed for continuous repetitive operation. Data Sheet 10 Rev. 1.0, 2008-05-15
BTM7810K
5.2
Pos. 5.2.1 5.2.2 5.2.3 5.2.4 5.2.5
Functional Range
Parameter Supply voltage Input voltage HS Input voltage LS Status output current Junction temperature Symbol Limit Values min. max. 42 15 20 2 110 V V V mA C After VS rising above VUVON - - - - Unit Remarks
VS VIH VIL IST Tj
VUVOFF
- 0.3 - 0.3 0 - 40
Note: Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table
5.3
Pos. 5.3.1 5.3.2 5.3.3
Thermal Resistance
Parameter LS-junction to case1) HS-junction to case
1) 1)
Symbol Min.
Limit Values Typ. - - 16 Max. 1.05 1.45 - - - -
Unit K/W K/W K/W
Conditions
Junction to ambient RthJA = Tj(HS) / (P(HS)+ P(LS))
RthJC L RthJC H RthJA
2)
1) Not subject to production test, specified by design. 2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product (chip+package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70m Cu, 2 x 35m Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.
Data Sheet
11
Rev. 1.0, 2008-05-15
BTM7810K
5.4
Electrical Characteristics
Electrical Characteristics
ISH1 = ISH2 = ISL1 = ISL2 = 0 A; - 40 C < Tj < 110 C; 8 V < VS < 18 V (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values min. typ. 4 - 2.5 5 - max. 9 15 4.5 9 7
Unit Test Condition
Current Consumption HS-switch 5.4.1 Quiescent current
IS
- -
A A mA mA A
IH1 = IH2 = 0 V Tj = 25 C IH1 = IH2 = 0 V IH1 or IH2 = 5 V
5.4.2 5.4.3 5.4.4
Supply current; one HS-switch active Supply current; both HS-switches active Leakage current of high-side switch Leakage current through logic GND in free wheeling condition Input current Leakage current of low-side switch
IS IS ISH LK
- - -
VS = 12 V
IH1 and IH2 = 5 V VS = 12 V
5.4.5
ILKCL = IFH + - ISH IIL IDL LK
- -
2.2
10
mA
VIH = VSH = 0 V VS = 12 V Tj = 85 C IFH = 5 A VS = 12 V VIL = 20 V; VDSL = 0V VIL = 0 V VDSL = 40V Tj = 85 C VS increasing VS decreasing VUVON - VUVOFF IFH = 5 A IFL = 5 A ISH = 5 A; VS = 12 V Tj = 25 C ISH = 5 A; VS = 12 V Tj = 110C2) ISL = 5 A; VIL = 5 V Tj = 25 C ISL = 5 A; VIL = 5 V Tj = 110 C2)
Current Consumption LS-switch 5.4.6 5.4.7 10 - 100 12 nA A
Under Voltage Lockout HS-switch 5.4.8 5.4.9 5.4.10 5.4.11 5.4.12 5.4.13 Switch-ON voltage Switch-OFF voltage Switch ON/OFF hysteresis Inverse diode of high-side switch; Forward-voltage Inverse diode of low-side switch; Forward-voltage Static drain-source on-resistance of high-side switch
VUVON VUVOFF VUVHY VFH VFL RDS ON H
- 1.8 - - - - -
- - 1 0.8 0.8 26 45 14 20
5 4.5 - 1.2 1.2 - 65 - 28
V V V V V m m m m
Output stages
5.4.14
Static drain-source on-resistance of low-side switch
RDS ON L
- -
Data Sheet
12
Rev. 1.0, 2008-05-15
BTM7810K
Electrical Characteristics
ISH1 = ISH2 = ISL1 = ISL2 = 0 A; - 40 C < Tj < 110 C; 8 V < VS < 18 V (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values min. typ. 48 42 27 36 14 180 170 10 0.2 - - - - 1.6 14 48 42 190 180 - 0.6 5 - 20 700 10 100 max. 65
Unit Test Condition
Short Circuit of high-side switch to GND 5.4.15 Initial peak SC current1) tdel = 150 s; VS = 12 V; VDSH = 12V
ISCP H
35
A A A k C C C V A V s s s s
Tj = -40 C Tj = 25C Tj = 110C2) VDSL = 3 V
- -
Short Circuit of high-side switch to VS 5.4.16 5.4.17 5.4.18 5.4.19 5.4.20 5.4.21 5.4.22 5.4.23 5.4.24 5.4.25 5.4.26 Output pull-down-resistor
2)
RO Tj SD Tj SO

7 155 150 - - - 5.4 - - - -
Thermal Shutdown
Thermal shutdown junction temperature Thermal switch-on junction temperature Temperature hysteresis Low output voltage Leakage current Zener-limit-voltage Status change after positive input slope with open load2) Status change after negative input slope with open load2) Status change after positive input slope with overtemperature2) Status change after negative input slope with overtemperature2) Open Load Detection Voltage
2)
 = TjSD - TjSO
Status Flag Output ST of high-side switch
VST L IST LK VST Z td(SToffo+) td(SToffo-) td(STofft+) td(STofft-)
IST = 1.6 mA VST = 5 V IST = 1.6 mA
RST = 47 k RST = 47 k
Open Load Detection in Off Condition 5.4.27 5.4.28 5.4.29 5.4.30 5.4.31 5.4.32 5.4.33 5.4.34 5.4.35 5.4.36
VOUT(OL) tON tOFF dV/dtON
-dV/dtOFF
2 - - - - - - - - -
3 100 120 0.5 0.7 20 85 60 80 4.5
4 220 250 1.1 1.3 - - - - -
V s s V/s V/s ns ns ns ns nC
VS = 12 V
Switching times of high-side switch Turn-ON-time to 90% VSH Turn-OFF-time to 10% VSH
RLoad = 12  VS = 12 V
Slew rate on 10 to 30% VSH Slew rate off 70 to 40% VSH
2)
Switching times of low-side switch
Turn-ON Delay Time Rise Time Switch-OFF Delay Time Fall Time
2)
td(on) tr td(off) tf QIS
resistive load ISL= 3A; VDSL=12V VIL = 5V; RG = 16
Gate charge of low-side switch
Input to source charge;
ISL = 3 A; VDSL=12 V
Data Sheet
13
Rev. 1.0, 2008-05-15
BTM7810K
Electrical Characteristics
ISH1 = ISH2 = ISL1 = ISL2 = 0 A; - 40 C < Tj < 110 C; 8 V < VS < 18 V (unless otherwise specified)
Pos. 5.4.37 5.4.38
Parameter
Input to drain charge; Input charge total;
Symbol
Limit Values min. typ. 12 30 max. - 60 -
-
Unit Test Condition nC nC
QID QI
5.4.39
Input plateau voltage;
V(plateau)
-
2.6
-
V
ISL = 3 A; VDSL=12 V ISL = 3 A; VDSL=12 V VIL = 0 to 5 V ISL = 3 A; VDSL=12 V
- - -
Control Inputs of high-side switches IH 1, 2 5.4.40 5.4.41 5.4.42 5.4.43 5.4.44 5.4.45 5.4.46 5.4.47 H-input voltage L-input voltage Input voltage hysteresis H-input current L-input current Input series resistance Zener limit voltage Gate-threshold-voltage
VIH High VIH Low VIH HY IIH High IIH Low RI VIH Z VIL th
- 1 - 5 5 2.7 5.4 0.8
- - 0.5 30 14 4 - 1.7
3.0 - - 65 25 6 - 3.0
V V V A A k V V
VIH = 5 V VIH = 0.4 V
-
IIH = 1.6 mA IDL = 1 mA
Control Inputs IL1, 2
1) When Vs>18V the peak short circuit current is significantly lower. 2) Not subject to production test; specified by design
Note: The listed characteristics are ensured over the operating range of the integrated circuit. Typical characteristics specified mean values expected over the production spread. If not otherwise specified, typical characteristics apply at TA = 25 C and the given supply voltage.
Data Sheet
14
Rev. 1.0, 2008-05-15
BTM7810K
6
Application Information
Note: The following simplified application examples are given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. The function of the described circuits must be verified in the real application
Watchdog Reset Q RQ 100 k
TLE 4278G
D CD 47nF
I
VS=12V
RQ 100 k
CQ 22F
D01 Z39
CS 10F
WD R
VCC RS 10 k
ST1
6
DHVS
8, 17
BCR192W Can be replaced by diode when Short to Vs detection is not needed ROL 560Ohm
to C RS 10 k ST2 11 Diagnosis Biasing and Protection
IH1
5
Gate Driver RO1 RO2
16 12
optional for open load in off SH2 DL2
IH2
10
Gate Driver
XC866 P
GND
9
7 18
SH1 DL1
M
IL1
3
IL2
13
2
14
GND
SL1
SL2
Figure 4
Application Example BTM7810K
Data Sheet
15
Rev. 1.0, 2008-05-15
BTM7810K
7
Package Outlines
21.6 0.2 10.2 8.3 1) 1.27 0.1 B A 0.1 0.05 8.18 0.15 4.4 5.56 0.15 4.8
1)
10.3
8.21)
(15)
9.25 0.2
8.41)
2.4
14x1.4
0.0.15 0.8 0.1
4.7 0.5
2.7 0.3
0.5 0.1
8 max.
0.25
1) M
AB
0.1
Typical All metal surfaces tin plated, except area of cut.
Footprint
0.8
21.6 8.4
16
9.5
0.4
1
Figure 5
PG-TO263-15-1 (Plastic Transistor Single Outline Package)
Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
For further information on alternative packages, please visit our website: http://www.infineon.com/packages. Data Sheet 16
4
Dimensions in mm
Rev. 1.0, 2008-05-15
BTM7810K
8
Rev. 1.0 Date
Revision History
Changes Initial Version
2008-05-15
Data Sheet
17
Rev. 1.0, 2008-05-15
Edition 2008-05-15 Published by Infineon Technologies AG 81726 Munich, Germany (c) 5/14/08 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.