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  receiver buffer translator Datasheet PDF File

For receiver buffer translator Found Datasheets File :: 166    Search Time::2.954ms    
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    ML13158

LANSDALE Semiconductor Inc.
LANSDALE Semiconductor ...
Part No. ML13158
OCR Text ...r single conversion wideband FM receiver incorporating a split IF. This device can be used as the backend in digital FM systems such as Digi...buffer The RSSI output current creates a voltage across an external resistor. A unity voltage-gain a...
Description Wideband FM IF Subsystem For Dect and Digital Applications

File Size 1,008.39K  /  23 Page

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    MC100EP01 MC10EP445 MC10H172FNR2 MC100EL29 MC100H600FN MC100H600FNR2 MC10H424 MC10H117FNR2 MC100EP016AFA MC10E016 MC100E

ON Semiconductor
Part No. MC100EP01 MC10EP445 MC10H172FNR2 MC100EL29 MC100H600FN MC100H600FNR2 MC10H424 MC10H117FNR2 MC100EP016AFA MC10E016 MC100EP809 MC100EPT622FAR2 MC10EP131 MC100EL1648MEL MC100LVEL31 MC10H161FNR2 MC100ELT25DR2 MC100EL90DWR2 MC100EL56DWR2 MC10H330 MC100E101 MC100LVEL29DWR2 MC10H209MEL
OCR Text ...e within the spec limits of the receiver and are recognized. Specific device data sheets should be consulted for exact specifications and pa...buffer gate as shown in AND8020, Figure 22. These ELT TTL devices typically display >2X the required...
Description 3.3V / 5V ECL 4-Input OR/NOR
3.3V / 5VECL 8-Bit Serial/Parallel Converter
Dual Binary 1-4-Decoder (High)
5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset
9-Bit TTL-ECL translator
Quad TTL-ECL translator
Dual 2-Wide 2-3-Input OR-AND/OR-AND-Invert Gate
3.3V / 5V ECL 8-Bit Synchronous Binary Up Counter
3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
3.3V 10-bit LVTTL/LVCMOS to LVPECL translator
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
5V ECL Voltage Controlled Oscillator
3.3V ECL D-Type Flip-Flop with Set and Reset
Binary to 1-8 Decoder (Low)
Differential -5V ECL To TTL translator
-3.3V / -5V Triple ECL Input to PECL Output translator
5V ECL Dual Differential 2:1 Multiplexer
Quad MSTR
5V ECL Quad 4-Input OR/NOR Gate
3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset
Dual 4-5-Input OR/NOR

File Size 52.36K  /  10 Page

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    NB7LQ572 NB7LQ572MNG NB7LQ572MNR4G

ON Semiconductor
Part No. NB7LQ572 NB7LQ572MNG NB7LQ572MNR4G
OCR Text ... incorporates a fixed Equalizer receiver, which when placed in series with a Data path, will enhance the degraded signal transmitted across an FR4 backplane or cable interconnect. For applications that do not require Equalization, consider ...
Description 2.5V / 3.3V Differential 4:1 Mux w/Input Equalizer to 1:2 LVPECL Clock/Data Fanout / translator

File Size 293.05K  /  12 Page

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    ST2204

Sitronix Technology Co., Ltd.
Part No. ST2204
OCR Text ...1 levels Universal Asynchronous receiver/Transmitter (UART) - Full-duplex operation - Baud rate generator with one digital PLL - Standard ba...buffer for transmitter and receiver for continuous data exchange - Programmable data length from 7-b...
Description 8 BIT Integrated Microcontroller with 512K Bytes ROM

File Size 673.55K  /  24 Page

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    MC100LVE222-D

ON Semiconductor
Part No. MC100LVE222-D
OCR Text ...Driver Device Qb 50 W 50 W D receiver Device Db V TT V TT = V CC - 2.0 V Figure 4. Typical Termination for Output Driver and Device Evaluation (Refer to Application Note AND8020 - Termination of ECL Logic Devices) Resource Re...
Description 3.3 VECL 1:15 Differential ?1/ ?2 Clock Driver

File Size 89.81K  /  8 Page

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    MC10E122-D

ON Semiconductor
Part No. MC10E122-D
OCR Text ... Driver Device Q 50 W 50 W D receiver Device D V TT VTT = VCC - 2.0 V Figure 1. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020 - Termination of ECL Logic Devices.) Resource Reference of...
Description 5V ECL 9 Bit buffer

File Size 62.57K  /  8 Page

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For receiver buffer translator Found Datasheets File :: 166    Search Time::2.954ms    
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