dual j-k negative-edge-trigger pdf Datasheet P11 Description --- IC-ON-LINE


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dual j-k negative-edge-trigger Datasheet PDF File

For dual j-k negative-edge-trigger Found Datasheets File :: 150+ Page :: | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | <11> | 12 | 13 | 14 | 15 |

				FAIRCHILD SEMICONDUCTOR CORP FAIRCHILD[Fairchild Semiconductor]
Part No.	74LVX112SJ 74LVX112 74LVX112M 74LVX112MTC 74LVX112MX 74LVX112MTCX 74LVX112SJX
Description	LV/LV-A/LVX/H SERIES, dual NEGATIVE EDGE TRIGGERED j-k FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16 Low Voltage dual j-k Flip-Flops with Preset and Clear
File Size	76.55K / 7 Page	View it Online	Download Datasheet

				NXP Semiconductors N.V.
Part No.	74AUP1G80GW 74AUP1G80GM 74AUP1G80GN
Description	Low-power D-type flip-flop; positive edge trigger 低功耗D型触发器;上升沿触 Low-power D-type flip-flop; positive edge trigger AUP/ULP/V SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, INVERTED OUTPUT, PDSO6
File Size	158.71K / 21 Page	View it Online	Download Datasheet

				锁存 FAIRCHILD[Fairchild Semiconductor]
Part No.	74F114SC 74F114 74F114PC
Description	双JK负沿触发器与普通时钟和清除拖鞋 dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears From old datasheet system
File Size	54.39K / 6 Page	View it Online	Download Datasheet

				NXP Semiconductors N.V.
Part No.	74AHC74D118 74AHCT74D 74AHC74PW-T 74AHCT74D-T 74AHC74BQ-G 74AHC74D112 74AHCT74BQ-G 74AHCT74PW
Description	dual D-type flip-flop with set and reset; positive-edge trigger dual D-type flip-flop with set and reset; positive-edge trigger
File Size	96.53K / 18 Page	View it Online	Download Datasheet

				NXP Semiconductors
Part No.	74HCT74N 74HCT74BQ 74HCT74D 74HCT74DB 74HC74 74HCT74PW 74HCT74D-T 74HC74DB118
Description	dual D-type flip-flop with set and reset; positive edge-trigger dual D-type flip-flop with set and reset; positive edge-trigger
File Size	179.35K / 21 Page	View it Online	Download Datasheet

				NXP Semiconductors PHILIPS[Philips Semiconductors]
Part No.	74LVC821A 74LVC821AD 74LVC821ADB 74LVC821APW 74LVC821A_1
Description	positive-edge trigger (3-State) From old datasheet system 10-bit D-type flip-flop with 5-volt tolerant inputs/outputs; positive-edge trigger 3-State 10-bit D-type flip-flop with 5-volt tolerant inputs/outputs;positive-edge trigger(3-State)(5V输入/输出容限的上升沿触发0位D触发器（三态）)
File Size	102.27K / 12 Page	View it Online	Download Datasheet

				NXP Semiconductors PHILIPS[Philips Semiconductors]
Part No.	74LVC823A 74LVC823AD 74LVC823ADB 74LVC823APW 74LVC823A_1
Description	positive-edge trigger (3-State) From old datasheet system 9-bit D-type flip-flop with 5-volt tolerant inputs/outputs; positive-edge trigger 3-State 9-bit D-type flip-flop with 5-volt tolerant inputs/outputs;positive-edge trigger(3-State)(5V输入/输出容限的上升沿触发位D触发器（三态）)
File Size	106.25K / 12 Page	View it Online	Download Datasheet

				TI store
Part No.	CD74HCT109
Description	<font color=red>[Old version datasheet]</font> dual j-k Flip-Flop with Set and Reset Positive-Edge Trigger
File Size	277.18K / 12 Page	View it Online	Download Datasheet

				Atmel, Corp. Atmel Corp. ATMEL[ATMEL Corporation]
Part No.	AT29C512-9 AT29C512-90JU AT29C512-70TC AT29C512-15 AT29C512-15JC AT29C512-15JI AT29C512-15PC AT29C512-15PI AT29C512-15TC AT29C512-15TI AT29C512-70 AT29C512-70JI AT29C512-70JU AT29C512-70PC AT29C512 AT29C512-90JC AT29C512-90JI AT29C512-90PC AT29C512-90PI AT29C512-90TI AT29C512-90TU 29C512 AT29C512-12 AT29C512-12JC AT29C512-12JI AT29C512-12PC AT29C512-12PI AT29C512-12TC AT29C512-12TI AT29C512-70JC AT29C512-70TI AT29C512-70TU AT29C512-90 AT29C512-90TC
Description	High Speed CMOS Logic dual Positive-Edge-Triggered D-Type Flip-Flops with Set and Reset 14-PDIP -55 to 125 64K X 8 FLASH 5V PROM, 90 ns, PDIP32 High Speed CMOS Logic dual negative-edge-triggered j-k Flip-Flops with Reset 14-SOIC -55 to 125 64K X 8 FLASH 5V PROM, 90 ns, PQCC32 High Speed CMOS Logic Quad 2-Input Exclusive-NOR Gates 14-SOIC -55 to 125 64K X 8 FLASH 5V PROM, 70 ns, PQCC32 High Speed CMOS Logic dual negative-edge-triggered j-k Flip-Flops with Reset 14-PDIP -55 to 125 64K X 8 FLASH 5V PROM, 70 ns, PQCC32 High Speed CMOS Logic dual negative-edge-triggered j-k Flip-Flops with Reset 14-SOIC -55 to 125 64K X 8 FLASH 5V PROM, 70 ns, PDIP32 High Speed CMOS Logic dual Positive-Edge-Triggered D-Type Flip-Flops with Set and Reset 14-SOIC -55 to 125 High Speed CMOS Logic Phase-Locked Loop with VCO and Lock Detector 16-SOIC -55 to 125 512K (64K x 8) 5-volt Only Flash Memory 512K 64K x 8 5-volt Only CMOS Flash Memory
File Size	198.78K / 18 Page	View it Online	Download Datasheet

				Fairchild Semiconductor
Part No.	DM74S112 74S112
Description	From old datasheet system dual negative-edge-triggered Master-Slave j-k Flip-Flop with Preset, Clear, and Complementary Outputs
File Size	42.51K / 4 Page	View it Online	Download Datasheet

For dual j-k negative-edge-trigger Found Datasheets File :: 150+ Page :: | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | <11> | 12 | 13 | 14 | 15 |

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