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  to-lvcmos lvttl Datasheet PDF File

For to-lvcmos lvttl Found Datasheets File :: 3225    Search Time::1.063ms    
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    ICS8442 ICS8442AY ICS8442AYLF ICS8442AYLFT ICS8442AYT

Integrated Circuit Syst...
Integrated Circuit Solution Inc
ICST[Integrated Circuit Systems]
Part No. ICS8442 ICS8442AY ICS8442AYLF ICS8442AYLFT ICS8442AYT
OCR Text TO-DIFFERENTIAL LVDS FREQUENCY SYNTHESIZER FEATURES * Dual differential LVDS outputs * Selectable crystal oscillator interface or LVCMOS/lvttl TEST_CLK * Output frequency range: 31.25MHz to 700MHz * Crystal input frequency range: 10MHz to...
Description 700MHZ, CRYSTAL OSCILLATOR-TO-DIFFERENTIAL LVDS FREQUENCY SYNTHESIZER
Hex schmitt-trigger inverters 14-SOIC 0 to 70

File Size 272.09K  /  15 Page

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    ICS87004 ICS87004AG ICS87004AGT

ICST[Integrated Circuit Systems]
Part No. ICS87004 ICS87004AG ICS87004AGT
OCR Text to-lvcmos/lvttl ZERO DELAY CLOCK GENERATOR FEATURES * 4 LVCMOS/lvttl outputs, 7 typical output impedance * Selectable CLK0, nCLK0 or CLK1, nCLK1 clock inputs * CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, ...
Description 1:4, DIFFERENTIAL-to-lvcmos/lvttl ZERO DELAY CLOCK GENERATOR
1:4 DIFFERENTIAL-to-lvcmos/lvttl ZERO DELAY CLOCK GENERATOR

File Size 174.09K  /  14 Page

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    MC100EPT62 MC100EPT622FAR2 MC100EPT622FA MC100EPT622

ONSEMI[ON Semiconductor]
Part No. MC100EPT62 MC100EPT622FAR2 MC100EPT622FA MC100EPT622
OCR Text to LVPECL Translator The MC100EPT622 is a 10- Bit lvttl/LVCMOS to LVPECL translator. Because LVPECL (Positive ECL) levels are used only +3.3 V and ground are required. The device has an OR- ed enable input which can accept either LVPECL (E...
Description 3.3V lvttl/LVCMOS to LVPECL Translator

File Size 73.46K  /  8 Page

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    Integrated Device Techn...
Integrated Circuit Syst...
Part No. 8T49N241
OCR Text ... allowing the generation of up to four different output frequenc ies, ranging from 8khz to 1ghz. these frequencies are completely independ...lvcmos output levels. this makes it ideal to be used in any frequency synthesis application, includ...
Description    Auto and manual clock selection with hitless switching
   Manual clock selection control input

File Size 989.56K  /  64 Page

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    CY2DL814 CY2DL814SCT CY2DL814ZCT CY2DL814ZI CY2DL814ZIT CY2DL814SC CY2DL814SI CY2DL814SIT CY2DL814ZC

CYPRESS[Cypress Semiconductor]
CYPRESS SEMICONDUCTOR CORP
Part No. CY2DL814 CY2DL814SCT CY2DL814ZCT CY2DL814ZI CY2DL814ZIT CY2DL814SC CY2DL814SI CY2DL814SIT CY2DL814ZC
OCR Text ... translations from single ended to LVDS and/or for the distribution of LVDS-based clock signals. The Cypress CY2DL814 has configurable input...LVCMOS Description Differential input pair or single line. LVPECL default. See config below. Convert...
Description Low-voltage operation
1:4 Clock Fanout Buffer

File Size 110.23K  /  8 Page

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    ICS87608AY ICS87608I ICS87608AYILF ICS87608AYILFT ICS87608AYIT ICS87608AYI

List of Unclassifed Manufacturers
ETC[ETC]
Part No. ICS87608AY ICS87608I ICS87608AYILF ICS87608AYILFT ICS87608AYIT ICS87608AYI
OCR Text ...e frequency * VCO range: 200MHz to 500MHz * Cycle-to-cycle jitter: 120ps (maximum), @ 3.3V * Period jitter, RMS: 20ps (maximum) * Output ske...LVCMOS or lvttl input levels. The ICS87608I has a fully integrated PLL along with frequency configur...
Description LOW VOLTAGE/LOW SKEW, 1:8 PCI/PCI-X ZERO DELAY CLOCK GENERATOR
LOW VOLTAGE/LOW SKEW 1:8 PCI/PCI-X ZERO DELAY CLOCK GENERATOR

File Size 142.73K  /  12 Page

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    Integrated Device Techn...
Part No. 8T49N241-001NLGI 8T49N241-000NLGI8 8T49N241-002NLGI 8T49N241-001NLGI8
OCR Text ... allowing the generation of up to four different output freq uencies, ranging from 8khz to 1ghz. these frequencies are completely independ...lvcmos output levels. this makes it ideal to be used in any frequency synthesis application, inclu...
Description    FemtoClock NG Universal Frequency Translator

File Size 1,249.55K  /  68 Page

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    NB4N855S NB4N855SMR4 NB4N855SMR4G

ONSEMI[ON Semiconductor]
Part No. NB4N855S NB4N855SMR4 NB4N855SMR4G
OCR Text to LVDS Receiver/Driver/Buffer/ Translator Description http://onsemi.com MARKING DIAGRAM* 10 1 Micro 10 M SUFFIX CASE 846B A Y W 855S AYW ...LVCMOS) to LVDS. Depending on the distance, noise immunity of the system design, and transmission li...
Description 3.3 V, 1.5 Gb/s Dual AnyLevelTM to LVDS Receiver/Driver/Buffer/ Translator

File Size 130.78K  /  10 Page

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