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INTEGRATED SILICON SOLUTION INC
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Part No. |
IS41LV8200A-50J
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OCR Text |
...tate during the cycle. power-on after application of the v dd supply, an initial pause of 200 s is required followed by a minimum of eight initialization cycles (any combination of cycles contain- ing a ras signal). during power-on, it i... |
Description |
2M X 8 EDO DRAM, 50 ns, PDSO28
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File Size |
126.75K /
20 Page |
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it Online |
Download Datasheet |
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NANYA TECHNOLOGY CORP
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Part No. |
NT5DS64M8AF-6K
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OCR Text |
...t be followed: v ddq is driven after or with v dd such that v ddq < v dd + 0.3v v tt is driven after or with v ddq such that v tt < v ddq + 0.3v v ref is driven after or with v ddq such that v ref < v ddq + 0.3v the dq and dqs... |
Description |
64M X 8 DDR DRAM, 0.7 ns, PBGA60
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File Size |
2,293.16K /
76 Page |
View
it Online |
Download Datasheet |
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Price and Availability
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