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Atmel, Corp.
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Part No. |
AT17LV020A-10JI
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OCR Text |
...series device is driven high by conf_done on the fpga devices, the first at17a series device clocks 16 additional cycles to initialize the fpga device before going into zero-power (idle) state. if ncs on the first at17a series device is dri... |
Description |
10MHZ, 3.3V, 20 PLCC, IND TEMP(FPGA) 2M X 1 confIGURATION MEMORY, PQCC20
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File Size |
135.50K /
13 Page |
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it Online |
Download Datasheet
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AVX
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Part No. |
TCP
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OCR Text |
...eibull: b = 0.1%/1000 hrs. 90% conf. c = 0.01%/1000 hrs. 90% conf. d = 0.001%/1000 hrs. 90% conf. z = non-er 0 qualification level 0 = n/a 9 = src9000 ^ termination finish 8 = hot solder dipped 9 = gold plated technical data: unless other... |
Description |
Low ESR Tantalum Modules
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File Size |
221.49K /
3 Page |
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it Online |
Download Datasheet
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Altera, Corp.
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Part No. |
EPC16XXX
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OCR Text |
...oup (jtag) boundary scan ninit_conf pin allows private jtag instruction to initiate fpga configuration internal pull-up resistor on ninit_conf always enabled user programmable weak internal pull-up resistors on ncs and oe pins ... |
Description |
435882001 2。增强型配置器件(EPC4,EPC8
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File Size |
288.45K /
36 Page |
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it Online |
Download Datasheet
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ALTERA[Altera Corporation]
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Part No. |
DS-S29804
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OCR Text |
...nnector (RJ1) User LEDs (D1-D8) conf_DONE LED (LED5) User Push-button Switches (SW4, SW5, SW6, SW7)
Note to Figure 1:
(1) A TI-EVM/FPDP connector (J31, J33) is found on the reverse side of the board.
Altera Corporation
3 Prelimina... |
Description |
Stratix II EP2S60 DSP Development Board
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File Size |
3,786.72K /
52 Page |
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it Online |
Download Datasheet
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Price and Availability
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