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  fbga-165 Datasheet PDF File

For fbga-165 Found Datasheets File :: 1500    Search Time::2.312ms    
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    Cypress Semiconductor, Corp.
Part No. CY7C1911BV18-278BZXC CY7C1911BV18-278BZXI CY7C1911BV18-300BZXC CY7C1911BV18-300BZI CY7C1911BV18-250BZI CY7C1311BV18-250BZI CY7C1313BV18-300BZC CY7C1313BV18-300BZI CY7C1315BV18-300BZXI CY7C1315BV18-300BZI
OCR Text ... to v dd available in 165-ball fbga package (13 x 15 x 1.4 mm) offered in both pb-free and non pb-free packages variable drive hstl output buffers jtag 1149.1 compatib le test access port delay lock loop (dll) for accurate data placeme...
Description 18-Mbit QDRII SRAM 4-Word Burst Architecture 2M X 9 QDR SRAM, 0.45 ns, PBGA165
18-Mbit QDRII SRAM 4-Word Burst Architecture 2M X 8 QDR SRAM, 0.45 ns, PBGA165
18-Mbit QDRII SRAM 4-Word Burst Architecture 1M X 18 QDR SRAM, 0.45 ns, PBGA165
18-Mbit QDRII SRAM 4-Word Burst Architecture 512K X 36 QDR SRAM, 0.45 ns, PBGA165

File Size 442.05K  /  32 Page

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    Cypress Semiconductor, Corp.
CYPRESS SEMICONDUCTOR CORP
Part No. CY7C1515AV18-200BZXI CY7C1526AV18-278BZXC CY7C1526AV18-250BZI CY7C1526AV18-300BZI CY7C1526AV18-250BZXI
OCR Text ... to v dd available in 165-ball fbga package (15 x 17 x 1.4 mm) offered in both pb-free and non pb-free packages variable drive hstl output buffers jtag 1149.1 compatib le test access port delay lock loop (dll) for accurate data placeme...
Description 72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 2M X 36 QDR SRAM, 0.45 ns, PBGA165
8M X 9 QDR SRAM, 0.45 ns, PBGA165

File Size 485.08K  /  31 Page

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    Cypress Semiconductor, Corp.
Part No. CY7C1163V18-400BZC
OCR Text ...v dd [1] available in 165-ball fbga package (13 x 15 x 1.4 mm) offered in both pb-free and non pb-free packages variable drive hstl output buffers jtag 1149.1 compatible test access port delay lock loop (dll) for accurate data placemen...
Description 18-Mbit QDR&#153;-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 1M X 18 QDR SRAM, 0.45 ns, PBGA165

File Size 461.23K  /  29 Page

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    Cypress Semiconductor, Corp.
Part No. CY7C1523AV18-200BZI CY7C1523AV18-300BZI CY7C1524AV18-200BZC CY7C1524AV18-250BZC CY7C1523AV18-167BZC CY7C1523AV18-167BZI
OCR Text ...?v dd ) ? available in 165-ball fbga package (15 x 17 x 1.4 mm) ? offered in lead-free and non lead-free packages ? jtag 1149.1 compatible test access port ? delay lock loop (dll) for accurate data placement configuration cy7c1522av18 ? 8m ...
Description 72-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 4M X 18 DDR SRAM, 0.45 ns, PBGA165
72-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 2M X 36 DDR SRAM, 0.45 ns, PBGA165
72-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 4M X 18 DDR SRAM, 0.5 ns, PBGA165

File Size 1,127.70K  /  28 Page

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    Cypress Semiconductor, Corp.
Part No. CY7C1423BV18-200BZI CY7C1423BV18-300BZI CY7C1429BV18-278BZI CY7C1429BV18-250BZI CY7C1429BV18-278BZC CY7C1429BV18-250BZC CY7C1429BV18-300BZI CY7C1422BV18-200BZXI CY7C1422BV18-167BZXC CY7C1422BV18-200BZXC CY7C1423BV18-200BZC CY7C1423BV18-278BZI CY7C1423BV18-250BZI CY7C1424BV18-278BZI CY7C1424BV18-278BZXC CY7C1423BV18-200BZXC CY7C1422BV18-250BZXI CY7C1424BV18-250BZXC
OCR Text ...v?v dd ) available in 165-ball fbga package (15 x 17 x 1.4 mm) offered in both pb-free and non pb-free packages jtag 1149.1 compatib le test access port delay lock loop (dll) for accurate data placement configurations cy7c1422bv18 ? 4m ...
Description 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 2M X 18 DDR SRAM, 0.45 ns, PBGA165
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 4M X 9 DDR SRAM, 0.45 ns, PBGA165
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 4M X 8 DDR SRAM, 0.45 ns, PBGA165
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 4M X 8 DDR SRAM, 0.5 ns, PBGA165
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 1M X 36 DDR SRAM, 0.45 ns, PBGA165

File Size 433.13K  /  30 Page

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    Cypress Semiconductor, Corp.
Part No. CY7C1423AV18-300BZI CY7C1423AV18-200BZI CY7C1429AV18-200BZXI CY7C1429AV18-278BZXI CY7C1429AV18-250BZXI CY7C1423AV18-200BZC CY7C1423AV18-278BZI CY7C1423AV18-250BZI CY7C1423AV18-300BZXC CY7C1423AV18-200BZXC CY7C1422AV18-278BZC CY7C1422AV18-167BZXI CY7C1424AV18-200BZXI
OCR Text ...v?v dd ) available in 165-ball fbga package (15 x 17 x 1.4 mm) offered in both pb-free and non pb-free packages jtag 1149.1 compatib le test access port delay lock loop (dll) for accurate data placement configurations cy7c1422av18 ? 4m ...
Description 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 2M X 18 DDR SRAM, 0.45 ns, PBGA165
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 4M X 9 DDR SRAM, 0.45 ns, PBGA165
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 4M X 8 DDR SRAM, 0.45 ns, PBGA165
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 4M X 8 DDR SRAM, 0.5 ns, PBGA165
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 1M X 36 DDR SRAM, 0.45 ns, PBGA165

File Size 434.33K  /  31 Page

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    Cypress Semiconductor, Corp.
CYPRESS SEMICONDUCTOR CORP
Part No. CY7C1367C-166BGC CY7C1366C-200BZI CY7C1366C-200BZC CY7C1367C-250BZXC CY7C1367C-250BZI CY7C1367C-250BGC CY7C1367C-250BGXI CY7C1367C-250BGXC CY7C1366C-200BGC
OCR Text ...9-ball bga package and 165-ball fbga package ? ieee 1149.1 jtag-compatible boundary scan ? ?zz? sleep mode option functional description [1] the cy7c1366c/cy7c1367c sram integrates 256k x 36 and 512k x 18 sram cells with advanced synchrono...
Description Low Cost, 300 MHz Rail-to-Rail Amplifier (Single); Package: SOT-23; No of Pins: 5; Temperature Range: Industrial 512K X 18 CACHE SRAM, 3.5 ns, PBGA119
Low Cost, Single, 300 MHz Voltage Feedback Amplifier; Package: SOT-23; No of Pins: 5; Temperature Range: Industrial 256K X 36 CACHE SRAM, 3 ns, PBGA165
9-Mbit (256K x 36/512K x 18) Pipelined DCD Sync SRAM 512K X 18 CACHE SRAM, 2.8 ns, PBGA165

File Size 499.66K  /  29 Page

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    Cypress Semiconductor, Corp.
Part No. CY7C1548V18-300BZC CY7C1548V18-300BZI CY7C1548V18-300BZXI CY7C1548V18-300BZXC CY7C1546V18-300BZI CY7C1546V18-300BZXI CY7C1548V18-375BZC CY7C1548V18-375BZI
OCR Text ... buffers available in 165-ball fbga package (15 x 17 x 1.4 mm) offered in both pb-free and non pb-free packages jtag 1149.1 compatib le test access port delay lock loop (dll) for accurate data placement configurations with read cycle la...
Description 72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) 4M X 18 DDR SRAM, 0.45 ns, PBGA165
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) 8M X 8 DDR SRAM, 0.45 ns, PBGA165

File Size 453.01K  /  28 Page

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    Cypress Semiconductor, Corp.
CYPRESS SEMICONDUCTOR CORP
Part No. CY7C1168V18-400BZXC CY7C1168V18-375BZXC CY7C1168V18-375BZC CY7C1166V18-400BZXC
OCR Text ... buffers available in 165-ball fbga package (13 x 15 x 1.4 mm) offered in both pb-free and non pb-free packages jtag 1149.1-compatible test access port delay lock loop (dll) for accurate data placement configurations with read cycle lat...
Description 1M X 18 DDR SRAM, 0.45 ns, PBGA165 13 X 15 MM, 1.40 MM HEIGHT, LEAD FREE, MO-216, fbga-165
18-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 1M X 18 DDR SRAM, 0.45 ns, PBGA165
2M X 8 DDR SRAM, 0.45 ns, PBGA165

File Size 455.35K  /  27 Page

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    Integrated Device Technology, Inc.
Part No. IDT71V67603133PFG IDT71V67603133BGG IDT71V67603133BQGI
OCR Text ...165 fine pitch ball grid array (fbga). description the idt71v67603/7803 are high-speed srams organized as 256k x 36, 512k x 18 3.3v synchron...165 fine pitch ball grid array (fbga). a 0 -a 18 address inputs input synchronous ce chip enable inp...
Description 256K X 36 CACHE SRAM, 4.2 ns, PQFP100 14 X 20 MM, 1.40 MM HEIGHT, 1 MM PITCH, ROHS COMPLIANT, PLASTIC, TQFP-100
256K X 36 CACHE SRAM, 4.2 ns, PBGA119 14 X 22 MM, ROHS COMPLIANT, PLASTIC, MS-028AA, BGA-119
256K X 36 CACHE SRAM, 4.2 ns, PBGA165 13 X 15 MM, ROHS COMPLIANT, fbga-165

File Size 420.55K  /  23 Page

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