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Lattice Semiconductor, Corp. LATTICE SEMICONDUCTOR CORP
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Part No. |
GAL20V8B-7LPN GAL20V8B-15QPN
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OCR Text |
...nology ? reconfigurable logic ? reprogrammable cells ? 100% tested/100% yields ? high speed electrical erasure (<100ms) ? 20 year data retention ? eight output logic macrocells ? maximum flexibility for complex logic designs ? programmable ... |
Description |
EE PLD, 7.5 ns, PDIP24 LEAD FREE, PLASTIC, DIP-24 EE PLD, 15 ns, PDIP24
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File Size |
658.82K /
27 Page |
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Cypress Semiconductor, Corp.
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Part No. |
CY37128VP84-83YMB CY37128P84-125YMB CY37128P84-100YMB
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OCR Text |
...000 family features in-system reprogrammable? (isr?) cmos cplds ? jtag interface for reconfigurability ? design changes don?t cause pinout changes ? design changes don?t cause timing changes high density ? 32 to 512 macrocells ? 32 to 2... |
Description |
EE PLD, 15 ns, CQCC84 CERAMIC, LCC-84 EE PLD, 10 ns, CQCC84 CERAMIC, LCC-84 EE PLD, 12 ns, CQCC84 CERAMIC, LCC-84
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File Size |
1,266.32K /
66 Page |
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Duracell
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Part No. |
A3P060-1CSG121I A3P060-1CS121 A3P1000-1PQ208 A3P1000-1PQ208I A3P060-1CS121I A3P125-1TQ144I A3P125-1VQ100 A3P1000-2PQ208 A3P060-CSG121I
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OCR Text |
...port sram ? up to 300 user i/os reprogrammable flash technology ? 130-nm, 7-layer metal (6 copper), flash-based cmos process ? live at power-up (lapu) level 0 support ? single-chip solution ? retains programmed design when powered off high ... |
Description |
FPGA, 1536 CLBS, 60000 GATES, PBGA121 6 X 6 MM, 0.99 MM HEIGHT, 0.50 MM PITCH, GREEN, CSP-121 FPGA, 1536 CLBS, 60000 GATES, PBGA121 6 X 6 MM, 0.99 MM HEIGHT, 0.50 MM PITCH, CSP-121 FPGA, 24576 CLBS, 1000000 GATES, 350 MHz, PQFP208 28 X 28 MM, 3.40 MM HEIGHT, 0.50 MM PITCH, PLASTIC, QFP-208 FPGA, 3072 CLBS, 125000 GATES, 350 MHz, PQFP144 20 X 20 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, TQFP-144 FPGA, 3072 CLBS, 125000 GATES, 350 MHz, PQFP100 14 X 14 MM, 1 MM HEIGHT, 0.50 MM PITCH, VQFP-100
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File Size |
6,231.29K /
218 Page |
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it Online |
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Price and Availability
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