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  two-bank Datasheet PDF File

For two-bank Found Datasheets File :: 8320    Search Time::1.329ms    
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    CY2V995 CY2V995AC CY2V995ACT CY2V995AI CY2V995AIT

CYPRESS[Cypress Semiconductor]
Part No. CY2V995 CY2V995AC CY2V995ACT CY2V995AI CY2V995AIT
OCR Text ...es which enable the user to run two banks (1Qn and 2Qn) at a power supply level different from that of the other two banks (3Qn and 4Qn). Ad...Bank 4 output buffers. Please see Table 8 for supply level constraints Power supply for Bank 3 outpu...
Description S2.5/3.3V 200-MHz Multi-Output Zero Delay Buffer

File Size 279.15K  /  10 Page

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    IDT5V9955 IDT5V9955BFI IDT5V9955BFI8

IDT[Integrated Device Technology]
Part No. IDT5V9955 IDT5V9955BFI IDT5V9955BFI8
OCR Text ...rs of programmable skew outputs Two separate A and B banks for individual control Low skew: 185ps same pair, 250ps same bank, 350ps both banks Selectable positive or negative edge synchronization on each bank: excellent for DSP applications...
Description 3.3V Programmable Skew Dual PLL Clock Driver Turboclock II
3.3V PROGRAMMABLE SKEW DUAL PLL CLOCK DRIVER TURBOCLOCK W

File Size 124.58K  /  11 Page

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    LPC1853JET256 LPC1837FET256 LPC1853FET256 LPC1837JET256 LPC1857FET256 LPC1837JET100 LPC1837JBD144 LPC1822JET100 LPC1825J

NXP Semiconductors
Part No. LPC1853JET256 LPC1837FET256 LPC1853FET256 LPC1837JET256 LPC1857FET256 LPC1837JET100 LPC1837JBD144 LPC1822JET100 LPC1825JBD144 LPC1823JET100 LPC1823JBD144 LPC1823JBD144E LPC1822JBD144 LPC1857JET256 LPC1853JBD208 LPC1857JBD208 LPC1833FET256 LPC1833JBD144 LPC1833JET100 LPC1833JET256
OCR Text ...gurable timer (sct) subsystem, two high-speed usb controllers, ethernet, lcd, an external memory controller, and multiple digital and anal...bank flash memory with flash accelerator. ? 16 kb on-chip eeprom data memory. ? 136 kb sram for code...
Description 32-bit ARM Cortex-M3 MCU; up to 1 MB flash and 136 kB

File Size 2,471.99K  /  147 Page

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    K4X56163PI-LFE/GC3 K4X56163PI-LFE/GC6

Samsung semiconductor
Part No. K4X56163PI-LFE/GC3 K4X56163PI-LFE/GC6
OCR Text two data transfers per clock cycle * Bidirectional data strobe(DQS) * Four banks operation * Differential clock inputs(CK and CK) * MRS cycl...Bank Address BA0,BA1 Row Address A0 - A12 Column Address A0 - A8 4. Ordering Information P...
Description 16Mx16 Mobile DDR SDRAM

File Size 298.34K  /  20 Page

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    MB84VD2002 MB84VD2002-10 MB84VD2003 MB84VD2003-10

Fujitsu Microelectronics
FUJITSU[Fujitsu Media Devices Limited]
Part No. MB84VD2002 MB84VD2002-10 MB84VD2003 MB84VD2003-10
OCR Text ...les * Sector erase architecture Two 16 K byte, four 8 K bytes, two 32 K byte, and fourteen 64 K bytes. Any combination of sectors can be con...Bank 1 8K byte/4K word EE000H 77000H 8K byte/4K word EC000H 76000H 32K byte/16K word E4000H 72000H B...
Description 8M (x 8/x 16) FLASH MEMORY & 2M (x 8) STATIC RAM

File Size 188.20K  /  30 Page

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    MB84VD2008 MB84VD2008-10 MB84VD2009 MB84VD2009-10

Fujitsu Microelectronics
FUJITSU[Fujitsu Media Devices Limited]
Part No. MB84VD2008 MB84VD2008-10 MB84VD2009 MB84VD2009-10
OCR Text ...les * Sector erase architecture Two 16 K byte, four 8 K bytes, two 32 K byte, and fourteen 64 K bytes. Any combination of sectors can be con...Bank 1 8K byte/4K word EE000H 77000H 8K byte/4K word EC000H 76000H 32K byte/16K word E4000H 72000H B...
Description 8M (x 16) FLASH MEMORY & 2M (x 16) STATIC RAM

File Size 181.11K  /  30 Page

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    PCF8548U/2 PCF8548U/9

Philips Semiconductors
NXP Semiconductors
Part No. PCF8548U/2 PCF8548U/9
OCR Text ...put. 7.11 SA0: slave address Two different slave addresses can be selected using the SA0 pad. This allows two PCF8548 LCD drivers to be c...bank of 102 bits [(8 x 8 + 1) x 102 bits]. During RAM access, data is transferred to the RAM via the...
Description 65 x 102 pixels matrix LCD driver

File Size 214.88K  /  40 Page

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    PIC16LV5XA02BI/P PIC16LV5XA02BI/SO PIC16LV5XA02BI/SS

Microchip Technology
Part No. PIC16LV5XA02BI/P PIC16LV5XA02BI/SO PIC16LV5XA02BI/SS
OCR Text ... for program branches which are two-cycle * Operating speed: DC - 2 MHz clock input DC - 2 s instruction cycle Device Pins I/O EPROM RAM ...Bank 0 Note 1: FSR<6:5> File Address 00h 01h 02h 03h 04h 05h 06h 07h 01 20h 40h 10 60h ...
Description EPROM-Based 8-Bit CMOS Microcontroller Series

File Size 131.16K  /  24 Page

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    MV20556

Mosel Vitelic Corp
MOSEL[Mosel Vitelic, Corp]
Part No. MV20556
OCR Text ...ect Addressing Nested Interrupt Two priority level interrupt A full duplex serial I/O port Working at 16/25/40 MHz Clock Full static operati...Bank contains registers R7-R0. 128 Addressable Bits There are 128 addressable software flags in t...
Description 8 - Bit MCU Mouse Controller

File Size 103.76K  /  30 Page

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    S3P7515 S3C7515

SAMSUNG SEMICONDUCTOR CO. LTD.
Part No. S3P7515 S3C7515
OCR Text ...r -- 4 interval timer functions Two 8-bit Timer/Counters -- Programmable interval timer -- External event counter function -- Timer/counters...bank 0. The SP is 8-bit read/writeable and SP bit 0 must always be logic zero. During an interrupt o...
Description The S3C7515/P7515 single-chip CMOS microcontroller has been designed for high-performance using Samsungs newest 4-bit CPU core/ SAM47
The S3C7515/P7515 single-chip CMOS microcontroller has been designed for high-performance using Samsungs newest 4-bit CPU core, SAM47

File Size 291.74K  /  42 Page

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