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  500ps Datasheet PDF File

For 500ps Found Datasheets File :: 599    Search Time::1.141ms    
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    ICS9341 ICS9341YF

ICST[Integrated Circuit Systems]
Part No. ICS9341 ICS9341YF
OCR Text ...CPU - CPU: <350ps - CPU - PCI: <500ps - PCI - PCI: <500ps Block Diagram X1 X2 OSC /4 2 4 REF (0:1) CPUCLKA (1:4) /2 PLL Spread Spectrum C o n t r o l Pin Configuration GNDREF X1 X2 VDDPCI PCICLK1 PCICLK2 PCICLK3 PCICLK4 ...
Description 133MHz Clock Generator and Integrated Buffer for PowerPC⑩

File Size 206.92K  /  9 Page

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    Linear
Part No. LTC1689 LTC1688 16889I
OCR Text ...3V Low Channel-to-Channel Skew: 500ps Typ Low tPLH/tPHL Skew: 500ps Typ Hot SwapTM Capable Driver Outputs Maintain High Impedance in Three-State or with Power Off Short-Circuit Protected: 3mA Typ Output Current for an Indefinite Short Therm...
Description 52Mbps/100Mbps RS485 Hot Swapable Quad Drivers
From old datasheet system

File Size 85.39K  /  8 Page

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    MC88920 MC88920DW

MOTOROLA[Motorola, Inc]
MOTOROLA[Motorola Inc]
Part No. MC88920 MC88920DW
OCR Text ...Q0-Q2) With Output-Output Skew <500ps and Six Outputs Total (Q0-Q2, Q3, 2X_Q,) With <1ns Skew Each Being Phase and Frequency Locked to the SYNC Input 20 1 * The Phase Variation From Part-to-Part Between SYNC and the `Q' Outputs Is Les...
Description LOW SKEW CMOS PLL CLOCK DRIVER With Power-Down/ Power-Up Feature

File Size 114.31K  /  10 Page

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    MC88921 MC88921DW

MOTOROLA[Motorola, Inc]
Part No. MC88921 MC88921DW
OCR Text ...Q0-Q3) With Output-Output Skew <500ps and Six Outputs Total (Q0-Q3, 2X_Q) With <1ns Skew Each Being Phase and Frequency Locked to the SYNC Input 20 1 * The Phase Variation From Part-to-Part Between SYNC and the `Q' Outputs Is Less Tha...
Description LOW SKEW CMOS PLL CLOCK DRIVER With Power-Down/ Power-Up Feature

File Size 104.35K  /  10 Page

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    PLL205-01 PLL205-01XC PLL205-01XI

ETC
Part No. PLL205-01 PLL205-01XC PLL205-01XI
OCR Text ... 250ps. PCI to PCI output skew: 500ps. CPU to CPU output skew: 175ps SDRAM to SDRAM output skew: 250ps. CPU to PCI skew (CPU leads): 0 ~ 3 ns. /2 24_48Mhz VDD3 SDRAM(0:11) SDRAMIN SDRAM12 47745 Fremont Blvd., Fremont, California...
Description Motherboard Clock Generator for AMD - K7

File Size 103.13K  /  12 Page

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    ICS
Part No. ICS9148-25
OCR Text ... 250ps window on CPU, SDRAM and 500ps window on PCI clocks CPU clocks to PCI clocks skew 1-4ns (CPU early) MODE input pin selects optional power management input control pins Two fixed outputs, 48MHz and 24 MHz Separate 2.5V and 3.3V supply...
Description 430TX Single Chip Clock, Supports up to 83.3MHz

File Size 528.40K  /  13 Page

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    ICS
Part No. ICS94258
OCR Text ...CPU - CPU: <250ps * PCI - PCI: <500ps * SDRAM - SDRAM: <250ps * AGP - AGP: <500ps * PCI - AGP: <750ps * CPU - SDRAM:<350ps * CPU - PCI: <3ns Pin Configuration 48-Pin 300mil SSOP & TSSOP Notes: REF0 can be 1X or 2X strength controlled...
Description Single Chip, System Clock for PIII/1651 Chipset; SDRAM Clocks with I2C Programmability with Early PCI Clock

File Size 343.99K  /  20 Page

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    ICS
Part No. ICS951104
OCR Text ...s * CPU - AGP/PCI Skew = 2.5ns 500ps 56-Pin 300-mil SSOP, 240-mil TSSOP 1 These outputs have 2x drive strength * Internal Pull-up resistor of 120K to VDD ** These inputs have 120K internal pull-down to GND Functionality FS3 0 0 0 0...
Description Programmable Timing Control Hub for P4 (P)

File Size 214.63K  /  19 Page

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    LTC1687 LTC1687CS 16867F LTC1686 LTC1686CS8

Linear Technology Corporation
LINER[Linear Technology]
Part No. LTC1687 LTC1687CS 16867F LTC1686 LTC1686CS8
OCR Text ...PLH/tPHL Skew: Receiver/Driver: 500ps Typ -7V to 12V RS485 Input Common Mode Range Guaranteed Fail-Safe Operation Over the Entire Common Mode Range High Input Resistance: 22k, Even When Unpowered Short-Circuit Protected Thermal Shutdown Pr...
Description 12-Bit, 2.5 us Dual DAC, Serial Input, Pgrmable Settling Time, Simultaneous Update, Low Power 8-SOIC -40 to 125
52Mbps Precision Delay RS485 Fail-Safe Transceivers
From old datasheet system

File Size 284.94K  /  12 Page

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