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CYPRESS SEMICONDUCTOR CORP
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Part No. |
MT58L128L32D1F-6
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OCR Text |
...rnally self-timed write cycle burst control pin (interleaved or linear burst) automatic power-down for portable applications 165-pin f...mode ce2 ce2# gw# bwe# pipelined enable dqs dqpa dqpb 2 18 output registers input registers 18 e 18 ... |
Description |
128K X 32 CACHE SRAM, 3.5 ns, PBGA165
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File Size |
437.01K /
26 Page |
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Download Datasheet |
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Part No. |
MT48V4M32LFF5-10XTG
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OCR Text |
...ccess/precharge ? programmable burst lengths: 1, 2, 4, 8, or full page ? auto precharge, includes co ncurrent auto precharge, and auto refresh modes ? self refresh mode; standard and low power ? 64ms, 4,096-cycle refresh (15.6s/row) ? lvt... |
Description |
4M X 32 SYNCHRONOUS DRAM, 7 ns, PBGA90
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File Size |
2,701.10K /
79 Page |
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it Online |
Download Datasheet |
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Micron Technology, Inc.
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Part No. |
MT16LSDT464A
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OCR Text |
...access/precharge ? programmable burst lengths: 1, 2, 4, 8 or full page ? auto precharge and auto refresh modes ? self refresh mode ? 64ms, 4,096-cycle refresh ? lvttl-compatible inputs and outputs ? serial presence-detect (spd) options mark... |
Description |
4 Meg x 64 SDRAM DIMMs(4M x 64????ㄦ?RAM,????存?瀛???ㄦā??
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File Size |
261.57K /
19 Page |
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it Online |
Download Datasheet |
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Part No. |
KM736V747T-10
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OCR Text |
...except output enable and linear burst order are synchronized to input clock. burst order control must be tied "high or low". asynchronous inputs include the sleep mode enable(zz). output enable controls the outputs at any given time. write... |
Description |
128K X 36 ZBT SRAM, 10 ns, PQFP100
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File Size |
386.96K /
17 Page |
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it Online |
Download Datasheet |
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Price and Availability
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