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...an advanced high-speed cmos hex schmitt inverter fabricated with sub-micron silicon gate and double-layer metal wiring c 2 mos technology. the internal circuit is composed of 3 stages including buffer output, which enables high noise immuni... |
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148.87K /
11 Page |
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...4 v ss ? ground 5 sda i/o schmitt(in)/ opendrain(out) i 2 c-bus data pin 6 scl i schmitt i 2 c-bus clock pin 7 sla1 i pull-down 50k slave address setting pin 8 sla2 i pull-down 50k slave address setting pin 9 yi7 i ... |
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122.93K /
13 Page |
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...less of the oen input. 4 rshp o schmitt hysteresis receiver output for dp (d+) input (cmos level digital output) when dp is high level, rshp is high. when dp is low level, rshp is low this pin also outputs correctly regardless of the oen in... |
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82.28K /
10 Page |
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