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Crystek, Corp.
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| Part No. |
CY7C0430CV-133BGI
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| OCR Text |
...gh-speed clock to data access 4.2 ns (maximum) synchronous pipelined device ? 1 mb (64k 18) switch array 0.25-micron cmos for optimum spe...5 of 42 addr. read port 1 operation cont rol logic block diagram r/w p1 ce 0p1 ce 1p1 lb p1 oe p1 ub... |
| Description |
10 Gb/s 3.3V QuadPort(TM) DsE Family; Density: 1 Mb; Organization: 64Kb x 18; Vcc (V): 3.15 to 3.45 V; speed: 133 MHz 64K X 18 FOUR-PORT sRAM, 4.2 ns, PBGA272
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| File Size |
616.42K /
42 Page |
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it Online |
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Power-One, Inc.
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| Part No. |
MT18VDVF12872Y-40BF1
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| OCR Text |
...d correction ?v dd = v dd q = +2.5v (-40b: v dd = v dd q = +2.6v) ?v ddspd = +2.3v to +3.6v ? 2.5v i/o (sstl_2-compatible) ? internal pip...5.0ns (200 mhz), 400 mt/s, cl = 3 -40b ? 6.0ns (166 mhz), 333 mt/s, cl = 2.5 -335 p c b hei g ht: 18... |
| Description |
128M X 72 DDR DRAM MODULE, DMA184 MO-206, DIMM-184
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| File Size |
479.47K /
14 Page |
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it Online |
Download Datasheet
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Lattice Semiconductor, Corp.
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| Part No. |
MT8VDDT3232UG-75XX MT8VDDT12832UY-75XX MT8VDDT6432UG-75ZXX MT8VDDT6432UY-75XX
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| OCR Text |
... 512mb (64 meg x 32) ?v dd = +2.5v ? 2.5v i/o (sstl_2 compatible) ? commands entered on each positive ck edge ? dqs edge-aligned with data for reads; center- aligned with data for writes ? internal, pipelined double data rate (ddr) archi... |
| Description |
32M X 32 DDR DRAM MODULE, 0.75 ns, DMA100 DIMM-100 128M X 32 DDR DRAM MODULE, 0.75 ns, DMA100 LEAD FREE, DIMM-100 64M X 32 DDR DRAM MODULE, 0.75 ns, DMA100
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| File Size |
605.22K /
36 Page |
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it Online |
Download Datasheet
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