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  latch shift Datasheet PDF File

For latch shift Found Datasheets File :: 6738    Search Time::4.234ms    
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    CD4094BC CD4094BCN CD4094BCWM CD4094

FAIRCHILD[Fairchild Semiconductor]
Part No. CD4094BC CD4094BCN CD4094BCWM CD4094
OCR Text latch with 3-STATE Outputs October 1987 Revised January 1999 CD4094BC 8-Bit shift Register/latch with 3-STATE Outputs General Description The CD4094BC consists of an 8-bit shift register and a 3STATE 8-bit latch. Data is shifted ser...
Description 8-Bit shift Register/latch with 3-STATE Outputs

File Size 67.22K  /  7 Page

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    DATADELAY[Data Delay Devices, Inc.]
Part No. 3D3444-8 3D3444 3D3444-10 3D3444-15 3D3444-2 3D3444-20 3D3444-25 3D3444-4 3D3444-5
OCR Text ...l Inputs Signal Outputs Address latch In Serial Clock In Serial Data In Serial Data Out 3.3V Ground where T0 is the inherent delay, An is...shift REGISTER Figure 1: Functional block diagram SO Doc #00119 8/2/02 DATA DELAY DEVICES, I...
Description MONOLITHIC QUAD 4-BIT PROGRAMMABLE DELAY LINE (SERIES 3D3444)
MONOLITHIC QUAD 4-BIT PROGRAMMABLE DELAY LINE (SERIES 3D3444)
300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit

File Size 146.54K  /  6 Page

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    CXA1786N

Sony Corporation
Part No. CXA1786N
OCR Text ... 13 DATA NC 9 1-bit latch 14-bit latch 18-bit shift Resister 1-bit shift Resister 12 PS FIN 10 2-modulus prescaler 1 1 or 64/65 128/129 Pulse swallow programmable counter 11 CK 18-bit latch Sony reser...
Description 1.1GHz-band PLL IC for Mobile Communications

File Size 181.78K  /  12 Page

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    CXA1787N

SONY[Sony Corporation]
Part No. CXA1787N
OCR Text ... 13 DATA NC 9 1-bit latch 14-bit latch 18-bit shift Resister 1-bit shift Resister 12 PS FIN 10 2-modulus prescaler 1 1 or 64/65 128/129 Pulse swallow programmable counter 11 CK 18-bit latch Sony reser...
Description 2GHz-band PLL IC for Mobile Communications

File Size 175.01K  /  13 Page

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    LS3718G-S28-R

Unisonic Technologies
Part No. LS3718G-S28-R
OCR Text ...ntrol circuit, shift register, latch and driver into a single ship. it is suitable for mcu interface. the effective interface assignment of mpu is available as the connection between utc ls3718 and mpu is required only 4 lines. the d...
Description    20-BIT SERIAL TO PARALLEL CONVERTER

File Size 165.52K  /  8 Page

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    DATADELAY[Data Delay Devices, Inc.]
Part No. 3D3424D-50 3D3424-1 3D3424-1.5 3D3424-10 3D3424-100 3D3424-15 3D3424-2 3D3424-20 3D3424-200 3D3424-300 3D3424-4 3D3424-40 3D3424-5 3D3424-50 3D3424D-1 3D3424D-1.5 3D3424D-10 3D3424D-100 3D3424D-15 3D3424D-2 3D3424D-20 3D3424D-200 3D3424D-300 3D3424D-4 3D3424D-40 3D3424D-5
OCR Text ...l Inputs Signal Outputs Address latch In Serial Clock In Serial Data In Serial Data Out 3.3V Ground where T0 is the inherent delay, An is...shift REGISTER SO Figure 1: Functional block diagram tLW latch (AL) CLOCK (SC) SERIAL INPUT ...
Description MONOLITHIC QUAD 4-BIT PROGRAMMABLE DELAY LINE ACTIVE DELAY LINE, TRUE OUTPUT, PDIP14

File Size 164.72K  /  6 Page

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For latch shift Found Datasheets File :: 6738    Search Time::4.234ms    
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