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  pll-split Datasheet PDF File

For pll-split Found Datasheets File :: 769    Search Time::1.406ms    
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    Zarlink
Part No. MT9076B
OCR Text ...d T1/E1/J1 framer and LIU, with PLL and 3 HDLCs In T1/J1 mode the LIU can recover signals attenuated by up to 36dB (at 772kHz) In E1 mode th...split phase unipolar signal (RTIP and RRING employed) or an NRZ signal (RTIP only used). Positive Po...
Description T1/E1/J1 3.3V Single Chip Transceiver

File Size 1,141.74K  /  166 Page

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    CY29962 CY29962AI

Cypress Semiconductor
Part No. CY29962 CY29962AI
OCR Text ...ECL_CLK PECL_CLK# FB_IN SELA PLL 0 1 REF FB 0 1 /2 /4 /8 /12 0 1 DQ 0 1 2 3 4 5 VSS T C LK PEC L_C LK PEC L_C LK# VD D R EF_SEL F B_SEL AVD D SELA SELB SELC VSSC 1 2 3 4 5 6 7 8 9 10 11 12 48 47 46 45 44 43 42 41 40 39...
Description 2.5V or 3.3V operation
2.5V/3.3V, 150-MHz Multi-Output Zero Delay Buffer

File Size 90.95K  /  7 Page

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    VSC8113QB

ETC
Part No. VSC8113QB
OCR Text ...chip Clock Multiplication Unit (PLL) for the high speed clock as well as a clock and data recovery unit (CRU) with 8 bit serial-to-parallel ...Split Loopback Equipment and facility loopback modes can be enabled simultaneously. In this case, hi...
Description ATM/SONET/SDH 622 Mb/s Transceiver Mux/Demux with Integrated Clock Generation and Clock Recovery

File Size 483.36K  /  28 Page

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    VSC8114QB2 VSC8114QB1 VSC8114QB VSC8114

Vitesse Semiconductor Corporation
ETC
Part No. VSC8114QB2 VSC8114QB1 VSC8114QB VSC8114
OCR Text ...chip Clock Multiplication Unit (PLL) for high speed clock generation as well as a Clock and data Recovery Unit (CRU) with 8-bit serialto-par...Split Loopback Equipment and facility loopback modes can be enabled simultaneously. In this case, hi...
Description ATM/SONET/SDH 622 Mb/s Transceiver Mux/Demux with Integrated Clock Generation and Clock Recovery

File Size 433.65K  /  24 Page

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    MAXIM - Dallas Semiconductor
Part No. MAX2360 MAX2362 MAX2364 MAX2364ECM MAX2362ECM MAX2360ECM
OCR Text ... otherwise noted.) PARAMETER IF_PLL Reference Frequency Frequency Reference Signal Level IF Main Divide Ratio IF Reference Divider Ratio VCO...split-band PCS operation. The PA drivers have open-collector outputs and require pull-up inductors. ...
Description Complete Dual-Band Quadrature Transmitters

File Size 402.05K  /  24 Page

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    ADE3800 ADE3800SXL ADE3800SXT ADE3800XL ADE3800XT

意法半导
STMicroelectronics
Part No. ADE3800 ADE3800SXL ADE3800SXT ADE3800XL ADE3800XT
OCR Text ...rated 10-bit Triple Channel ADC/PLL IQSyncTM AutoSetup Integrated Programmable Timing Controller Integrated LVDS Transmitters Integrated Pat...split line support for SXGA smart panels Supports 18, 24, 36, and 48-bit RSDS outputs Advanced Flick...
Description RES, MF, 1%, 1/4W, 499K
RES, 4.99K, 1%, .125W, MF
Analog LCD Display Engine for XGA and SXGA Resolutions with Embedded LVDS and RSDS Transmitters

File Size 29.46K  /  3 Page

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    CY7B9950 CY7B9950AC CY7B9950ACT CY7B9950AI CY7B9950AIT

CYPRESS[Cypress Semiconductor]
Part No. CY7B9950 CY7B9950AC CY7B9950ACT CY7B9950AI CY7B9950AIT
OCR Text PLL Clock Buffer Features * * * * * * * * * * * * * * * 2.5V or 3.3V operation Split output bank power supplies Output frequency range: 6 MHz to 200 MHz Output-output skew < 100 ps Cycle-cycle jitter < 100 ps 2% max output duty cycle Sel...
Description Clocks and Buffers : RoboClock Skew Management
2.5/3.3V, 200-MHz High-Speed Multi-Phase PLL Clock Buffer
2.5/3.3V 200-MHz High-Speed Multi-Phase PLL Clock Buffer

File Size 167.28K  /  9 Page

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    Fujitsu
Part No. MB90523 MB90522
OCR Text ...s s FEATURES * Clock Embedded PLL clock multiplication circuit Operating clock (PLL clock) can be selected from divided-by-2 of oscillatio...Split resistor for LCD drive: Internal Reset generation interval: 3.58 ms, 14.33 ms, 57.23 ms, 458.7...
Description F 2 MC-16LX MB90520 Series

File Size 932.28K  /  127 Page

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    Infineon
Part No. SDA9400
OCR Text ...llerup (+45) 4477-4477 NZ PLL 1 Clock doubling PLL 2 Clock doubling LM Line memory CH P D PK PL The SDA 9400 is a single core IC for 100 Hz containing all necessary blocks RC The SDA 9400 contains all necess...
Description Scanrate Converter

File Size 120.05K  /  2 Page

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    TA0038

RFMD[RF Micro Devices]
Part No. TA0038
OCR Text ...es a frequency error within the PLL that the loop begins to correct for. The effect of the loop correcting for the frequency errors caused b...split phase coding. The basis of this coding is to send two complementary symbols for every data bit...
Description DC ACCURATE FSK MODULATOR

File Size 134.97K  /  6 Page

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