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Philips
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Part No. |
74LVCH16244A 74LVC16244A
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OCR Text |
....
QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; tr = tf 2.5 ns. SYMBOL tPHL/tPLH CI CPD Note 1. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi x N + (CL x VCC2 x fo) where: fi = input frequency in ... |
Description |
16-bit buffer/line driver; 5 V
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File Size |
98.07K /
20 Page |
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it Online |
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FAIRCHILD[Fairchild Semiconductor]
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Part No. |
74LVX138 74LVX138M 74LVX138MTC 74LVX138SJ
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OCR Text |
...d Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by a... |
Description |
Low Voltage 1-of-8 Decoder/Demultiplexer
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File Size |
58.86K /
6 Page |
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it Online |
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STMicro
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Part No. |
74LVX138 6572
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OCR Text |
...PUTS INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC = 3V LOW POWER DISSIPATION: ICC = 4 A (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.3 V (TYP.) at VCC = 3.3V SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4 mA (MIN) BALANCED PROPAGATION DELAYS... |
Description |
LOW VOLTAGE 3 TO 8 LINE DECODER (INV.) From old datasheet system
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File Size |
68.88K /
9 Page |
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it Online |
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Fairchild
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Part No. |
74LVX74
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OCR Text |
...d Circuit (SOIC), JEDEC MS-120, 0.150" Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by a... |
Description |
Low Voltage Dual D-Type Positive Edge-Triggered
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File Size |
71.99K /
6 Page |
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it Online |
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IDT
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Part No. |
79RC32355
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OCR Text |
...additional status pins-- PCST[2:0]--which are used in conjunction with the JTAG pins for realtime trace information at the processor internal clock or any division of the pipeline clock.
3 of 47
December 17, 2002
IDT 79RC32355
T... |
Description |
Integrated Communications Processor
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File Size |
576.00K /
47 Page |
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it Online |
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Price and Availability
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