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  lvcmos-to-3.3v Datasheet PDF File

For lvcmos-to-3.3v Found Datasheets File :: 4809    Search Time::1.703ms    
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    ICS843023 ICS843023AG ICS843023AGT

ICST[Integrated Circuit Systems]
Part No. ICS843023 ICS843023AG ICS843023AGT
OCR Text ... are in a high impedance state. LVCMOS/LVTTL interface levels. Differential clock outputs. LVPECL interface levels. TABLE 1. PIN DESCRIPT...to internal input resistors. See Table 2, Pin Characteristics, for typical values. TABLE 2. PIN C...
Description 3.3V, 250MHZ LVPECL CLOCK GENERATOR

File Size 167.19K  /  10 Page

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    ICS843031 ICS843031AG ICS843031AGT

PHOENIX CONTACT Deutschland GmbH
ICST[Integrated Circuit Systems]
Part No. ICS843031 ICS843031AG ICS843031AGT
OCR Text ... supply pin. Output enable pin. LVCMOS/LVTTL interface levels. Differential clock outputs. LVPECL interface levels. TABLE 1. PIN DESCRIPT...to internal input resistors. See Table 2, Pin Characterristics, for typical values. TABLE 2. PIN ...
Description CABLE ASSEMBLY; BANANA PLUG TO BANANA PLUG; 50 OHM, RG316/U COAX; 72" CABLE LENGTH FEMTOCLOCKS⑩晶体至3.3V的LVPECL时钟发生
FEMTOCLOCKS⑩ CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR
FEMTOCLOCKS CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR

File Size 200.89K  /  11 Page

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    ICS9219 ICS9219YGLF-T

ICST[Integrated Circuit Systems]
Part No. ICS9219 ICS9219YGLF-T
OCR Text ... Rambus channels. An additional LVCMOS output, which provides a reference clock at the crystal frequency for the other system blocks is also...to Cycle jitter is less than 100ps 3.3V + 4% supply LVCMOS REF clock @ crystal frequency Output edge...
Description Direct Rambus Clock Generator Lite

File Size 77.86K  /  8 Page

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    ICSSSTV16857 ICSSSTV16857YL-T ICS16857 ICSSSTV16857YG-T ICSSSTV16857YGLF-T

Integrated Circuit Syst...
ICST[Integrated Circuit Systems]
NXP Semiconductors N.V.
DOMINANT Opto Technologies Sdn. Bhd.
Part No. ICSSSTV16857 ICSSSTV16857YL-T ICS16857 ICSSSTV16857YG-T ICSSSTV16857YGLF-T
OCR Text ...t for the RESET# input which is LVCMOS. Data flow from D to Q is controlled by the differential clock, CLK, CLK# and RESET#. Data is triggered on the positive edge of CLK. CLK# must be used to maintain noise margins. RESET# must be supporte...
Description SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO48 0.240 INCH, 0.50 MM PITCH, TSSOP-48
DDR 14-Bit Registered Buffer 复员14位注册缓冲区

File Size 112.85K  /  8 Page

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    ICSSSTV16859 ICSSSTV16859YK

ICST[Integrated Circuit Systems]
Part No. ICSSSTV16859 ICSSSTV16859YK
OCR Text ...t for the RESET# input which is LVCMOS. Data flow from D to Q is controlled by the differential clock, CLK, CLK# and RESET#. Data is triggered on the positive edge of CLK. CLK# must be used to maintain noise margins. RESET# must be supporte...
Description DDR 13-Bit to 26-Bit Registered Buffer

File Size 231.88K  /  8 Page

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    IDT74SSTV16857 IDT74SSTV16857PA IDT74SSTV16857PAG IDT74SSTV16857PAG8 IDT74SSTV16857PA8

IDT[Integrated Device Technology]
Integrated Device Technology, Inc.
Part No. IDT74SSTV16857 IDT74SSTV16857PA IDT74SSTV16857PAG IDT74SSTV16857PAG8 IDT74SSTV16857PA8
OCR Text ...t RESET control compatible with LVCMOS levels Flow-through architecture for optimum PCB design Drive up to equivalent of 14 SDRAM loads Latch-up performance exceeds 100mA ESD >2000V per MIL-STD-883, Method 3015; >200V using machine model (C...
Description 14-BIT REGISTERED BUFFER WITH SSTL I/O

File Size 52.38K  /  6 Page

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    MAX9115 MAX9115EXK-T

MAXIM - Dallas Semiconductor
MAXIM[Maxim Integrated Products]
Part No. MAX9115 MAX9115EXK-T
OCR Text ...t and translates it to an LVTTL/LVCMOS output. The fail-safe feature sets the output high when the inputs are undriven and open, terminated, or shorted. The device supports a wide common-mode input range, allowing a ground potential differe...
Description Single LVDS Line Receiver in SC70

File Size 136.50K  /  8 Page

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    MC145472FE MC74LCX16373DT ON1550 MC74LCX16373

MOTOROLA[Motorola, Inc]
MOTOROLA[Motorola Inc]
Part No. MC145472FE MC74LCX16373DT ON1550 MC74LCX16373
OCR Text ... When VCC = 0V LVTTL Compatible LVCMOS Compatible 24mA Balanced Output Sink and Source Capability DT SUFFIX PLASTIC TSSOP PACKAGE CASE 12...to +7.0 -0.5 VI +7.0 -0.5 VO +7.0 -0.5 VO VCC + 0.5 IIK IOK DC Input Diode Current DC Output D...
Description From old datasheet system
LOW-VOLTAGE CMOS 16-BIT TRANSPARENT LATCH

File Size 120.19K  /  6 Page

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    MC74LCX16646 MC74LCX16646DT

MOTOROLA[Motorola, Inc]
Part No. MC74LCX16646 MC74LCX16646DT
OCR Text ... When VCC = 0V LVTTL Compatible LVCMOS Compatible 24mA Balanced Output Sink and Source Capability Near Zero Static Supply Current in All Thr...to change without notice. 11/96 (c) Motorola, Inc. 1996 1 REV 0.2 MC74LCX16646 DIR1 1...
Description LOW-VOLTAGE CMOS 16-BIT TRANSCEIVER/ REGISTERED TRANSCEIVER

File Size 160.33K  /  10 Page

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