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Freescale Semiconductor
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| Part No. |
MPC8360E
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| OCR Text |
...de range of protocols including atm, ethernet, hdlc, and pos. the quicc engine module's enhanced interworking eases the transition a nd reduces investment costs from atm to ip based systems. the other major features include a dua l ddr sd... |
| Description |
(MPC8358E / MPC8360E) PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications
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| File Size |
1,245.64K /
112 Page |
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it Online |
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Freescale Semiconductor
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| Part No. |
MPC8567E
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| OCR Text |
... for the following protocols: ? atm sar up to 622 mbps (oc-12) full duplex, with atm traffic shaping (atf tm4.1) for up to 64k atm connecti...pos-phy interfaces with 124 multi-phy addresses on utopia interface each or 31 multi-phy addresses ... |
| Description |
(MPC8567E / MPC8568E) PowerQUICC III Integrated Processor Hardware Specifications
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| File Size |
1,471.22K /
139 Page |
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it Online |
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pmc
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| Part No. |
2001398
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| OCR Text |
...face with SONET/SDH processing, atm and Packet mapping functions at the STS-48c (STM-16-16c) 2488.32 Mbit/s rate. The PM5381 features integr...pos) interfaces. The pos interface can be used to support several packet based protocols, including ... |
| Description |
From old datasheet system
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| File Size |
177.63K /
19 Page |
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it Online |
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pmc
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| Part No. |
1990553
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| OCR Text |
...ATURN(R) User Network Interface atm Layer Solution
Data Sheet
Proprietary and Confidential Preliminary Issue 4: June 2001
Proprietary...pos-PHY and SCI-PHY are trademarks of PMC-Sierra, Inc.
Patents
Relevant patent applications and ... |
| Description |
From old datasheet system
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| File Size |
2,240.84K /
432 Page |
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pmc
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| Part No. |
2000506
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| OCR Text |
.............3 2.1 2.2 2.3 2.4 2.5 atm DROP SIDE LOOP BACK......................................................4 atm TRANSPARENT ....................................................................5 pos DROP SIDE LOOP BACK ...................... |
| Description |
From old datasheet system
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| File Size |
1,415.32K /
107 Page |
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it Online |
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pmc
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| Part No. |
2000330
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| OCR Text |
...rfaces
FEATURES
* Single chip atm and packet processor capable of processing STS-48/STM-16 aggregate payload. * Optionally interprets the ...pos-PHY Level 3TM 32-bit System Interface (clocked up to 104 MHz) for Packet over SONET/SDH (pos), H... |
| Description |
From old datasheet system
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| File Size |
108.28K /
2 Page |
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it Online |
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pmc
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| Part No. |
2000331
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| OCR Text |
...-16x155.
Quad Channel OC-12c atm and pos Physical Layer Device
FEATURES
* Single chip quad atm and pos UserNetwork Interface operating at 622 Mbit/s. * Implements the atm Forum User Network Interface Specification and the atm physical ... |
| Description |
From old datasheet system
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| File Size |
107.55K /
2 Page |
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it Online |
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