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  master target Datasheet PDF File

For master target Found Datasheets File :: 1703    Search Time::1.14ms    
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    YMF754 YMF754-R YMF754-V

YAMAHA CORPORATION
ETC
Part No. YMF754 YMF754-R YMF754-V
OCR Text ... * Supports clock run * PCI Bus master for PCI Audio True Full Duplex Playback and Capture with different Sampling Rate Maximum 64-voice XG ...target specifications and are subject to change without prior notice. When using this device, please...
Description DS-1E

File Size 302.64K  /  60 Page

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    DS1996 DS1996L-F5

MAXIM - Dallas Semiconductor
Dallas Semiconducotr
DALLAS[Dallas Semiconductor]
Part No. DS1996 DS1996L-F5
OCR Text ...conomically communicates to bus master with a single digital signal at 16.3k bits per second Standard 16 mm diameter and 1-WireTM protocol e...target address to which the data will be written or from which data will be sent to the master upon ...
Description 64kbit Memory iButtonTM

File Size 320.42K  /  18 Page

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    PNX8526 PNX8526EH

NXP Semiconductors
Part No. PNX8526 PNX8526EH
OCR Text ...been granted to an external PCI master. Used where internal arbiter is configured. Auxiliary Arbitration Grant_B is asserted to indicate bus...target is prepared to accept data. Wait states are inserted until IRDY and TRDY are both asserted. P...
Description Programmable source decoder with integrated peripherals

File Size 450.93K  /  59 Page

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    PNX8526 PNX8526EH

PHILIPS[Philips Semiconductors]
Part No. PNX8526 PNX8526EH
OCR Text ...been granted to an external PCI master. Used where internal arbiter is configured. Auxiliary Arbitration Grant_B is asserted to indicate bus...target is prepared to accept data. Wait states are inserted until IRDY and TRDY are both asserted. P...
Description From old datasheet system
Programmable source decoder with integrated peripherals
Programmable source decoder with integrated peripherials

File Size 439.32K  /  59 Page

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    ES2828 ES2828S ES2898 ES2898S

ESS Technology
ETC[ETC]
List of Unclassifed Manufacturers
Part No. ES2828 ES2828S ES2898 ES2898S
OCR Text ...FRAME# is driven by the current master to indicate the beginning and duration of an access. FRAME# is asserted to indicate the start of a bu...target is requesting the master to stop the current transaction. target ready. TRDY# is used in conj...
Description V.90 PCI DSP Modem Solution

File Size 54.21K  /  6 Page

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    ES2838 ES2838S

ESS Technology
ETC[ETC]
Electronic Theatre Controls, Inc.
Part No. ES2838 ES2838S
OCR Text ...active-low. The current PCI bus master drives this pin to indicate the beginning and duration of a transaction. Initiator ready, active-low....target ready pin, active-low. The current PCI bus master drives this pin to indicate that as the tar...
Description V.90/V.92 PCI HSP Modem Product Brief

File Size 40.19K  /  4 Page

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    CY7C09449PVA-AC

Cypress Semiconductor
Part No. CY7C09449PVA-AC
OCR Text ...and PCI bus to become a PCI bus master and move data into or out of the internal shared memory as a direct memory access (DMA). The CY7C0944...target PCI Specification 2.2 compliant interface Embedded host bridge capability Direct interface to...
Description 128 Kb Dual-Port SRAM with PCI Bus Controller

File Size 598.48K  /  52 Page

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    QUICKLOGIC CORP
Part No. QL902M200-2PSN544C
OCR Text ...ons  support for external bus master arbitration (through fpga library provided by quicklogic) two ethernet controllers  two 10/100 ma...target ! pci target access to system address space ! pci target to pci configuration registers ! pci...
Description FPGA, 2016 CLBS, 533000 GATES, PBGA544

File Size 703.84K  /  106 Page

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    CY7C09449PV-AC

CYPRESS[Cypress Semiconductor]
Part No. CY7C09449PV-AC
OCR Text ... of dual-ported shared memory * master and target PCI Specification 2.2 compliant interface * Embedded host bridge capability * Direct interface to many microprocessors * I2O message transport unit; includes four 32-bit, 32entry FIFO * Loca...
Description 128 Kb Dual-Port SRAM with PCI Bus Controller (PCI-DP)

File Size 605.87K  /  50 Page

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    Agilent (Hewlett-Packard)
Part No. 1670G 1672G 1673G
OCR Text ...ount between states [3] Minimum master-to-master clock time* Minimum master-to-slave clock time Minimum slave-to-master clock time Clock qualifier setup/hold 3.5 ns 8 ns or 0.1% (whichever is greater) 34.4 seconds 4.29 x 109 states 6.67 ns...
Description 1670G Standalone Logic Analyzer with 500 MHz Timing/150 MHz State, 136 Channels, 128K Memory
1672G Standalone Logic Analyzer with 500 MHz Timing/150 MHz State, 68 Channels, 128K Memory
1673G Standalone Logic Analyzer with 500 MHz Timing/150 MHz State, 34 Channels, 128K Memory

File Size 1,653.47K  /  23 Page

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For master target Found Datasheets File :: 1703    Search Time::1.14ms    
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