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  pll- Datasheet PDF File

For pll- Found Datasheets File :: 29713    Search Time::3.328ms    
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    Freescale (Motorola)
Part No. MPC99J93
OCR Text ...ent dynamic clock switch (idcs) pll clock driver the mpc99j93 is a pll clock driver designed specifically for redun- dant clock tree designs. the device receives two differential lvpecl clock signals from which it generates 5 new differenti...
Description Intelligent Dynamic Clock Switch

File Size 265.38K  /  8 Page

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    BCM8011 BCM8002 BCM801104 BCM5632

BOARDCOM[Broadcom Corporation.]
ETC
Part No. BCM8011 BCM8002 BCM801104 BCM5632
OCR Text ...ions On-chip phase-locked loop (PLL), providing clock synthesis from 156.25 MHz clock references Optional 8B/10B encoder and 10B/8B decoder in each channel Parallel or serial loopback modes Built-In Self-Test (BIST) capability Termination r...
Description 4-Channel 3.125 Gigabit Ethernet CMOS Transceiver
FOUR-CHANNEL 3.125 GIGABIT ETHERNET CMOS TRANSCEIVER
FOUR CHANNEL 3.125 GIGABIT ETHERNET CMOS TRANSCEIVER

File Size 126.21K  /  2 Page

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    Motorola
Part No. MPC7455ARXPXPNS
OCR Text ...oltage v dd 1.57 v +30/?50 mv v pll supply voltage av dd 1.57 v +30/?50 mv v die-junction temperature t j 0 to 65 c note: these are the recommended and tested operating conditions. proper device operation outside of these conditions is no...
Description MPC7455 Part Number Specification for XC7455ARXnnnPX Series

File Size 222.97K  /  8 Page

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    IDT
Part No. IDT5V996BBI8
OCR Text pll clock driver turboclock ii plus december 2001 2001 integrated device technology, inc. dsc 5855/4 c industrial temperature range the idt logo is a registered trademark of integrated device technology, inc. features: ? 3.3v operation ...
Description 3.3V Programmable Skew PLL Clock Driver Turboclock II Plus

File Size 64.76K  /  9 Page

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    BCM8152

ETC
Part No. BCM8152
OCR Text ...tput Limiting amplifier On-chip pll-based clock generator Line and system loopback modes Receiver and transmitter serial data polarity invert Bit order reversal Analog loss-of-signal output (ALOSB) and input (LOSIB) Tx and Rx lock detect 10...
Description 10 GBPS TRANSCEIVER WITH 10G CLOCK, BUS SKEW, AND LIMITING AMPLIFIER

File Size 125.98K  /  2 Page

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    SGTL5000

NXP Semiconductors
Part No. SGTL5000
OCR Text ...adphone design and an internal pll help lowe r overall system cost. features analog inputs ? stereo linein - support for external analog input ? stereo linein - codec bypass for low power ? mic bias provided ? programmable mic gain ? adc -...
Description Low Power Stereo Codec with Headphone Amp

File Size 1,131.20K  /  68 Page

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    ICS343MIP

Integrated Circuit Solution Inc
Part No. ICS343MIP
OCR Text ...ck? software to configure the pll and output, the ics343 contains a one-time program- mable (otp) rom to allow field programmability. using phase-locked loop (pll) techniques, the device runs from a standard fundamental mode, inexpensi...
Description Field Programmable Triple Output SS VersaClock Synthesizer

File Size 95.71K  /  7 Page

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