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pll-ii Datasheet PDF File

For pll-ii Found Datasheets File :: 2847 Search Time::4.187ms
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				Silicon image
Part No.	SII3531
OCR Text	...0 Gbps * Plesiochronous, single PLL architecture, with one PLL * Signal output amplitude control for external SATA * 31 commands and scatter/gather tables * Protocol override per command * Independent link, transport and data FIFO * Host...
Description	SteelVine⑩ Host Controller
File Size	214.52K / 2 Page	View it Online	Download Datasheet

				Cypress
Part No.	CY7C25682KV18-400BZXC CY7C25682KV18-500BZC CY7C25682KV18-550BZXI
OCR Text	...access port phase-locked loop (pll) for accurate data placement configurations with read cycle latency of 2.5 cycles: cy7c25682kv18 ? 4 m ...ii+ architecture. the ddr ii+ consists of an sram core with advanced synchronous peripheral circuitr...
Description	72-Mbit DDR II SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) with ODT
File Size	612.03K / 29 Page	View it Online	Download Datasheet

				Silicon image
Part No.	SII3132
OCR Text	...ress Application Interface SATA PLL PCI Express Serdes PCI Express TxLink XTAL PCI Express PLL Configuration and Global Register...II optional features * Supports 2nd-generation Serial ATA II transfer rate of 3.0 Gbps * Plesiochron...
Description	PCI Express to 2-Port Serial ATA II Host Controller
File Size	157.84K / 2 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CYP15G0101DXB-BBXC CYP15G0101DXB-BBXI CYW15G0101DXB CYW15G0101DXB-BBC CYW15G0101DXB-BBI CYW15G0101DXB-BBXC CYW15G0101DXB-BBXI CYV15G0101DXB-BBXC CYV15G0101DXB-BBXI
OCR Text	...d loops (PLLs) with no external PLL components * Dual differential PECL-compatible serial inputs -- Internal DC-restoration * Dual different...II family with enhanced levels of integration and faster data rates, while maintaining serial-link c...
Description	Single-channel HOTLink II⑩ Transceiver
File Size	442.21K / 39 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CYP15G0401TB CYP15G0401TB-BGC CYP15G0401TB-BGI CYP15G0401TB-BGXC CYP15G0401TB-BGXI
OCR Text	...h * Internal phase-locked loop (PLL) with no external PLL components * Dual differential PECL-compatible serial outputs per channel -- Sourc...II consist of four byte-wide channels. Each channel can accept either eight-bit data characters or p...
Description	Quad HOTLink II⑩ Transmitter
File Size	282.67K / 30 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CYV15G0203TB CYV15G0203TB-BGC
OCR Text	...d loops (PLLs) with no external PLL components * Redundant differential PECL-compatible serial outputs per channel -- No external bias resis...II device accepts scrambled 10-bit transmission characters. These characters are serialized and outp...
Description	Independent Clock Dual HOTLink II™ Serializer Independent Clock Dual HOTLink II Serializer
File Size	510.59K / 19 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CYV15G0203TB CYV15G0203TB-BGXC CYV15G0203TB07
OCR Text	...d loops (PLLs) with no external PLL components * Redundant differential PECL-compatible serial outputs per channel -- No external bias resis...II device accepts scrambled 10-bit transmission characters. These characters are serialized and outp...
Description	Independent Clock Dual HOTLink II Serializer Independent Clock Dual HOTLink II⑩ Serializer
File Size	341.87K / 20 Page	View it Online	Download Datasheet

For pll-ii Found Datasheets File :: 2847 Search Time::4.187ms
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