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Philips
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| Part No. |
LPC2114_LPC2124
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| OCR Text |
128/256 kB ISP/IAP Flash with 10-bit ADC
Rev. 01 -- 18 November 2003 Preliminary data
1. General description
The LPC2114/LPC2124 are ba...Macrocell enables non-intrusive high speed real-time tracing of instruction execution. s Four channe... |
| Description |
Single-chip 16/32-bit microcontrollers; 128/256 kB ISP/IAP Flash with 10-bit ADC
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| File Size |
145.27K /
36 Page |
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Altera
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| Part No. |
EPM7128E EPM7064 EPM7160E EPM7032 MAX7000
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| OCR Text |
...uitry in MAX 7000S devices with 128 or more macrocells Complete EPLD family with logic densities ranging from 600 to 5,000 usable gates (see...macrocell flipflops with individual clear, preset, clock, and clock enable controls Programmable pow... |
| Description |
MAX7000
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| File Size |
1,072.55K /
85 Page |
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Lattice Semiconductor Corp
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| Part No. |
M4A5-64_32-10JC
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| OCR Text |
...5.5 167 4.0 3.5 40 Yes Yes M4A5-128 128 64 5.5 167 4.0 3.5 55 Yes Yes M4A5-192 192 96 6.0 160 4.5 3.5 74 Yes Yes M4A5-256 256 128 6.5 154 5....macrocell-I/O cell ratio (see next page). 2. Block clocks do not go to I/O cells in M4A(3,5)-32/32. ... |
| Description |
IC,COMPLEX-EEPLD,64-CELL,10NS PROP DELAY,LDCC,44PIN,PLASTIC
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| File Size |
740.58K /
61 Page |
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it Online |
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LATTICE[Lattice Semiconductor]
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| Part No. |
MACH445-12 MACH445-15 MACH445-15YC MACH445-12YC MACH445-20YC
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| OCR Text |
...149.1 JTAG testing capability s 128 macrocells s 12 ns tPD s 83 MHz fCNT s 70 inputs with pull-up resistors s 64 outputs s 192 flip-flops -- 128 macrocell flip-flops -- 64 input flip-flops
Lattice Semiconductor
s Up to 20 product term... |
| Description |
High-Density EE CMOS Programmable Logic
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| File Size |
206.54K /
28 Page |
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it Online |
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CYPRESS[Cypress Semiconductor]
Cypress Semiconductor Corp
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| Part No. |
CY37064VP48-100BAC CY37512 CY37000 CY37032 CY37064 CY37128 CY37192 CY37256 CY37384
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| OCR Text |
... X X 100 83 66 Macrocells 32 64 128 192 256 384 512 Dedicated Inputs 5 5 5 5 5 5 5 I/O Pins 32 32/64 64/128 120 128/160/192 160/192 160/192/...macrocell feedbacks from within the logic blocks. The number of PIM inputs increases with pin count ... |
| Description |
5V, 3.3V, ISR High-Performance CPLDs
From old datasheet system
COMPLEX-EEPLD,64-CELL,12NS PROP DELAY,BGA,48PIN,PLASTIC
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| File Size |
1,640.49K /
67 Page |
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it Online |
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Zarlink
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| Part No. |
MV1403
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| OCR Text |
...tter timing
CLK 1 FRS 32 64 96 128
D
D5
D6
D7
D8
D1
TS16 Q N.B. The D input is sampled on counts 24, 56, 88 etc. D1 D2...macrocell performs its CRC procedure on this incoming data stream. In non-CRC mode, this macrocell u... |
| Description |
PCM MACROCELL DEMONSTRATOR
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| File Size |
225.07K /
17 Page |
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it Online |
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Samsung
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| Part No. |
S5N8951 S5N8947 S5N8950
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| OCR Text |
...136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 DATA[21] DATA[20] DATA[19] GND17 VDD17 DATA[18] DATA[17] DATA[16] DATA[15] DATA[14] DATA[13] DATA[12] DATA[11] D... |
| Description |
1 Port ADSL Transceiver W/PCI
ARM7TDMI 72MHz,H/W SAR,UTOPIA L1/2,USB,2 Ethernet MAC
Full Rate(G.dmt/G.lite) dmt Transceiver for CO/CPE
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| File Size |
802.05K /
108 Page |
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it Online |
Download Datasheet |
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Price and Availability
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