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BST60 TXN604 DG190AP 10112633 1N4754 N5551 IRLU3715 1V221M
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    BCM5324M

BOARDCOM
Broadcom Corporation.
Part No. BCM5324M
OCR Text ...network into smaller broadcast domains to preserve bandwidth and increase network security. * Programmable Broadcast, Multicast, and Unknown Unicast storm control * Four flexible Class of Service (CoS) queues per port assures * P...
Description Integrated 24 FE 2GbE Managed Switch
SINGLE-CHIP L2 MANAGED SWITCH WITH 24 10/100 PORTS 2 GbE PORTS

File Size 114.03K  /  2 Page

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    SAA1575HL

Philips Semiconductors
Part No. SAA1575HL
OCR Text ...ackup supplies and reset Supply domains Power-down design strategy System reset control Power saving modes Clock signals and oscillators System clock (XTAL1) RTC clock (XTAL3) Reference clock (RCLK) 8 9 10 11 12 13 14 14.1 14.2 14.3 14.4 14...
Description Global Positioning System GPS baseband processor

File Size 741.76K  /  56 Page

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    ISPPAC-CLK5510V ISPPAC-CLK5510V-01T48I ISPPAC-CLK5510V-01T48C ISPPAC-CLK5520V-01T100C ISPPAC-CLK5520V-01T100I ISPPAC-CLK

LATTICE[Lattice Semiconductor]
Part No. ISPPAC-CLK5510V ISPPAC-CLK5510V-01T48I ISPPAC-CLK5510V-01T48C ISPPAC-CLK5520V-01T100C ISPPAC-CLK5520V-01T100I ISPPAC-CLK5520V-01TN100C ISPPAC-CLK5520V-01TN100I ISPPAC-CLK55XX ISPPAC-CLK5510V-01TN48C ISPPAC-CLK5510V-01TN48I
OCR Text ... Up to Five Clock Frequency domains Flexible Clock Reference Inputs * Programmable input standards - LVTTL, LVCMOS, SSTL, HSTL, LVDS, LVPECL * Clock A/B selection multiplexer * Programmable precision termination Four User-progra...
Description In-System Programmable Clock Generator with Universal Fan-Out Buffer

File Size 794.03K  /  43 Page

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    MVTX2803 MVTX2803AG

ZARLINK[Zarlink Semiconductor Inc]
Part No. MVTX2803 MVTX2803AG
OCR Text ...itecture Consists of two Memory domains at 133 MHz Frame Buffer Domain: Two banks of ZBT-SRAM with 2M/4MB total Switch Database Domain with 256K/512K SRAM * -40C to +85C * * * Traffic Classification * * * Classify traffic into 8 t...
Description Unmanaged 8-Port 1000 Mbps Ethernet Switch

File Size 664.33K  /  127 Page

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    Zarlink
Part No. MVTX2803
OCR Text ...itecture Consists of two Memory domains at 133 MHz * Frame Buffer Domain: Two banks of ZBTSRAM with 2M/4MB total * Switch Database Domain with 256K/512K SRAM Up to 64K MAC addresses to provide large node aggregation in wiring closet switche...
Description Unmanaged 8-Port 1000 Mbps Ethernet Switch

File Size 666.84K  /  134 Page

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    STPCELITE

STMicroelectronics
Part No. STPCELITE
OCR Text ... This results in multiple clock domains as described in Figure 1-2. Figure 1-2. STPC Elite clock architecture MCLKO MCLKI SDRAM controller GPCLK PLL MCLK PLL HCLK PLL HCLKO ISA CPU x1 x2 HCLKI IPC North B...
Description X86 Core General Purpose PC Compatible System - on - Chip

File Size 949.37K  /  87 Page

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    ADSP-TS101S

Analog Devices
Part No. ADSP-TS101S
OCR Text .......................... 9 Clock domains .................................................... 9 Output Pin Drive Strength Control ......................... 10 Power Supplies ................................................... 10 Filtering Re...
Description TigerSharc Embedded Processor

File Size 694.78K  /  44 Page

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