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  lvpecl lvnecl Datasheet PDF File

For lvpecl lvnecl Found Datasheets File :: 96    Search Time::1.734ms    
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    NB7L86MMNR2G NB7L86MMNR2 NB7L86M NB7L86MMN NB7L86MMNG

ONSEMI[ON Semiconductor]
Part No. NB7L86MMNR2G NB7L86MMNR2 NB7L86M NB7L86MMN NB7L86MMNG
OCR Text ...d accept lvnecl (Negative ECL), lvpecl (Positive ECL), LVCMOS, LVTTL, CML, or LVDS. The differential 16 mA CML output provides matching internal 50 W termination, and 400 mV output swing when externally terminated 50 W to VCC. The device is...
Description 2.5V/3.3V 12 Gb/s Differential Clock/Data SmartGate with CML Output and Internal Termination

File Size 1,720.25K  /  12 Page

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    ONSEMI[ON Semiconductor]
Part No. NBSG16MMNR2 NBSG16MMN NBSG16M
OCR Text ...d accept lvnecl (Negative ECL), lvpecl (Positive ECL), LVTTL, LVCMOS, CML, or LVDS. The CML output structure contains internal 50 W source termination resistor to VCC. The device generates 400 mV output amplitude with 50 W receiver resistor...
Description 2.5V/3.3V SiGe Differential CML Receiver/Driver
2.5V/3.3V Multilevel Input to CML Clock/Data Receiver/Driver/Translator Buffer
2.5V/3.3VMultilevel Input to CML Clock/Data Receiver/Driver/Translator Buffer
2.5V/3.3VMultilevel Input to CML Clock/Data Receiver/Driver/Translator Buffer

File Size 81.34K  /  12 Page

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    SY100E310LJITR SY100E310LJI SY100E310L SY100E310JI SY100E310JITR SY100E310JY SY100E310JYTR

MICREL[Micrel Semiconductor]
Part No. SY100E310LJITR SY100E310LJI SY100E310L SY100E310JI SY100E310JITR SY100E310JY SY100E310JYTR
OCR Text ...skew s Low voltage operation: * lvpecl: +3.3V 10% * LVECL: -3.3V 10% s Internal 75k pull-down resistors s Guaranteed over industrial tempera...lvnecl DC ELECTRICAL CHARACTERISTICS(7, 8) VCC = +3.3V, VEE = 0V; TA = -40C to +85C; unless noted. ...
Description 3.3V ECL/PECL 2:8 DIFFERENTIAL FANOUT BUFFER

File Size 66.73K  /  6 Page

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    AN1672 AN1672D

ON Semiconductor
Part No. AN1672 AN1672D
OCR Text lvpecl * NECL * TTL * LVTTL/LVCMOS * CMOS http://onsemi.com Prepared by: Paul Shockman ON Semiconductor APPLICATION NOTE Objective Th...lvnecl). Any device may be operated with all pins offset by a fixed voltage, but interface with stan...
Description The ECL Translator Guide

File Size 51.46K  /  10 Page

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    FAIRCHILD[Fairchild Semiconductor]
Part No. 100LVEL11M8 100LVEL11 100LVEL11M 100LVEL11MX
OCR Text ...for actual device operation. lvpecl DC Electrical Characteristics VCC = 3.3V; VEE = 0.0V (Note 2) Symbol IEE VOH VOL VIH VIL VIHCMR Para...lvnecl DC Electrical Characteristics VCC = 0.0V; VEE = -3.3V (Note 6) Symbol IEE VOH VOL VIH VIL VI...
Description 3.3V ECL 1:2 Differential Fanout Buffer

File Size 130.62K  /  6 Page

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    Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
Part No. 100LVEL16M8 100LVEL16 100LVEL16M 100LVEL16MX
OCR Text ...for actual device operation. lvpecl DC Electrical Characteristics VCC = 3.3V; VEE = 0.0V (Note 2) Symbol IEE VOH VOL VIH VIL VBB VIHCMR ...lvnecl DC Electrical Characteristics VCC = 0.0V; VEE = -3.3V (Note 6) Symbol IEE VOH VOL VIH VIL VB...
Description 3.3V ECL Differential Receiver; Package: SOIC; No of Pins: 8; Container: Tape &amp; Reel LINE RECEIVER, PDSO8

File Size 140.89K  /  6 Page

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    ONSEMI[ON Semiconductor]
Part No. NB100LVEP91_06 NB100LVEP91 NB100LVEP91DW NB100LVEP91DWG NB100LVEP91DWR2 NB100LVEP91DWR2G NB100LVEP91MN NB100LVEP91MNG NB100LVEP91MNR2 NB100LVEP91MNR2G NB100LVEP9106
OCR Text ... translator. The device accepts lvpecl, LVTTL, LVCMOS, HSTL, CML or LVDS signals, and translates them to differential lvnecl output signals (-2.5 V / -3.3 V). To accomplish the level translation the LVEP91 requires three power rails. The VC...
Description 2.5 V/3.3 V Any Level Positive Input to −2.5 V/−3.3 V lvnecl Output Translator

File Size 142.11K  /  10 Page

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    ONSEMI[ON Semiconductor]
Part No. NB6L16_07 NB6L16 NB6L16D NB6L16DG NB6L16DR2 NB6L16DR2G NB6L16DT NB6L16DTG NB6L16DTR2 NB6L16DTR2G
OCR Text lvpecl/lvnecl Clock or Data Receiver/ Driver/Translator Buffer The NB6L16 is a high precision, low power ECL differential clock or data receiver/driver/translator buffer. The device is functionally equivalent to the EL16, EP16, LVEL16 and ...
Description 2.5V / 3.3V Multilevel Input to Differential lvpecl/lvnecl Clock or Data Receiver/ Driver/Translator Buffer

File Size 185.33K  /  12 Page

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    ONSEMI[ON Semiconductor]
Part No. NBSG16M_06 NBSG16M NBSG16MMN NBSG16MMNG NBSG16MMNR2 NBSG16MMNR2G NBSG16M06
OCR Text ...d accept lvnecl (Negative ECL), lvpecl (Positive ECL), LVTTL, LVCMOS, CML, or LVDS. The CML output structure contains internal 50 W source termination resistor to VCC. The device generates 400 mV output amplitude with 50 W receiver resistor...
Description 2.5 V/3.3 VMultilevel Input to CML Clock/Data Receiver/Driver/Translator Buffer

File Size 146.49K  /  11 Page

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    MICREL[Micrel Semiconductor]
Part No. SY100EP195VTITR SY100EP195V SY100EP195VTI
OCR Text ... 12.2ns. The input can be PECL, lvpecl, NECL, or lvnecl. The delay varies in discrete steps based on a control word presented to SY100EP195V. The 10-bit width of this latched control register allows for delay increments of approximately 10p...
Description 3.3V/5V 2.5GHz PROGRAMMABLE DELAY CHIP

File Size 231.12K  /  18 Page

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For lvpecl lvnecl Found Datasheets File :: 96    Search Time::1.734ms    
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