| OCR Text |
...ailable User I/O(1) 182 202 265 289 329 410 514 Maximum Differential I/O Pairs 83 86 114 120 120 172 205 Distributed RAM Bits 24,576 38,400 55,296 75,264 98,304 153,600 221,184 Block RAM Bits 32K 40K 48K 56K 64K 160K 288K
Device XC2S50E ... |
| Description |
Second generation ASIC replacement technology
FPGA, 864 CLBS, 52000 GATES, 357 MHz, PBGA676
100,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN FPGA, 864 CLBS, 52000 GATES, 357 MHz, PBGA256
400000 SYSTEM GATE 1.8 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN FPGA, 864 CLBS, 52000 GATES, 357 MHz, PBGA456
300,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN FPGA, 1536 CLBS, 93000 GATES, 400 MHz, PBGA456
Spartan-IIE FPGA
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