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Part No. |
IS45S32400B-6BA1
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OCR Text |
...zed in 1meg x 32 bit x 4 banks. 4meg x 32 128-mbit synchronous dram july 2006 key timing parameters parameter -6 -7 unit clk cycle time cas latency = 3 6 7 ns cas latency = 2 8 10 ns clk frequency cas latency = 3 166 143 mhz cas latency... |
Description |
4meg x 32 128-MBIT SYNCHRONOUS DRAM
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File Size |
632.38K /
60 Page |
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Download Datasheet |
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Twilight Technology, Inc.
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Part No. |
DP5Z4MW16PI3-12C
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OCR Text |
...iques. features: organization: 4meg x 16 fast access times: 120, 150, 200ns (max.) single 5.0 volt high-density symmetrically blocked architecture - sixteen 64 k word blocks per device extended cycling capability - 100k write/erase cyc... |
Description |
4M X 16 FLASH 5V PROM, 120 ns, QMA48 STRAIGHT LEAD PACKAGE-48
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File Size |
1,013.97K /
21 Page |
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it Online |
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Twilight Technology, Inc.
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Part No. |
DP5Z4MX16PI3-12C
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OCR Text |
...iques. features: organization: 4meg x 16 fast access times: 120, 150, 200ns (max.) single 5.0 volt high-density symmetrically blocked architecture - sixteen 128 kbyte blocks per device extended cycling capability - 100k write/erase cyc... |
Description |
4M X 16 FLASH 5V PROM MODULE, 120 ns, CQIP48 HERMETIC SEALED, CERAMIC, STRAIGHT, MODULE, SLCC-48
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File Size |
2,901.21K /
21 Page |
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it Online |
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Integrated Device Technology, Inc. INTEGRATED DEVICE TECHNOLOGY INC
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Part No. |
IDT72V36110L7.5PF V36100L6PF
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OCR Text |
... ? ? ? higher density, 2meg and 4meg supersync ii fifos ? ? ? ? ? up to 166 mhz operation of the clocks ? ? ? ? ? user selectable asynchronous read and/or write ports (pbga only) ? ? ? ? ? user selectable input and output port bus-sizing - ... |
Description |
3.3 VOLT HIGH-DENSITY SUPERSYNC II36-BIT FIFO 128K X 36 OTHER FIFO, 5 ns, PQFP128 3.3 VOLT HIGH-DENSITY SUPERSYNC II??36-BIT FIFO
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File Size |
479.23K /
48 Page |
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it Online |
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INTEGRATED SILICON SOLUTION INC
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Part No. |
IS42S16800A-7TI-TR
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OCR Text |
... follows. 16meg x 8, 8meg x16 & 4meg x 32 128-mbit synchronous dram preliminary information august 2005 key timing parameters parameter -6 -7 -10 unit clk cycle time cas latency = 3 6 7 10 ns cas latency = 2 - 10 10 ns clk frequency cas ... |
Description |
8M X 16 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
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File Size |
589.84K /
61 Page |
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it Online |
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Price and Availability
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