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EXAR[Exar Corporation]
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| Part No. |
XRK7933
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| OCR Text |
...h circuit continuously monitors both input CLK signals. Upon detection of a failure (CLK stuck HIGH or LOW for at least 1 period), the INP_BAD for that CLK will FIGURE 1. BLOCK DIAGRAM OF THE XRK7933
* Fully Integrated PLL * Intelligent ... |
| Description |
INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER
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| File Size |
144.03K /
10 Page |
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it Online |
Download Datasheet
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Weida Semiconductor, In...
WEIDA[Weida Semiconductor, Inc.]
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| Part No. |
WCSS0232V1P-75AC WCSS0232V1P WCSS0232V1P-100AC WCSS0232V1P-133AC
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| OCR Text |
...counter. When ADSP and ADSC are both asserted, only ADSP is recognized. ASDP is ignored when CE1 is deasserted HIGH. Address Strobe from Controller, sampled on the rising edge of CLK. When asserted LOW, A[15:0] is captured in the address re... |
| Description |
64K x 32 Synchronous-Pipelined Cache RAM
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| File Size |
262.36K /
14 Page |
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it Online |
Download Datasheet |
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EXAR[Exar Corporation]
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| Part No. |
XRK7955
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| OCR Text |
...h circuit continuously monitors both input CLK signals. Upon detection of a failure (CLK stuck HIGH or LOW for at least 1 period), the INP_BAD for that CLK will FIGURE 1. BLOCK DIAGRAM OF THE XRK7955
* Fully Integrated PLL * Intelligent ... |
| Description |
INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER
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| File Size |
144.74K /
10 Page |
View
it Online |
Download Datasheet |
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WEIDA[Weida Semiconductor, Inc.]
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| Part No. |
WCMB4016R4X-FF70 WCMB4016R4X
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| OCR Text |
...outputs are disabled (OE HIGH), both Byte High Enable and Byte Low Enable are disabled (BHE, BLE HIGH), or during a write operation (CE LOW and WE LOW). Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) ... |
| Description |
256K x 16 Static RAM
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| File Size |
157.04K /
12 Page |
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it Online |
Download Datasheet |
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WEIDA[Weida Semiconductor, Inc.]
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| Part No. |
WCMB2016R4X-FF70 WCMB2016R4X
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| OCR Text |
...outputs are disabled (OE HIGH), both Byte High Enable and Byte Low Enable are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW). Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE)... |
| Description |
128K x 16 Static RAM
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| File Size |
154.25K /
11 Page |
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it Online |
Download Datasheet |
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WEIDA[Weida Semiconductor, Inc.]
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| Part No. |
WCMA4016U4X-FF70 WCMA4016U4X
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| OCR Text |
...99% when deselected (CE HIGH or both BLE and BHE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are disabled (OE HIGH), both Byte High Enable and Byte Low Enabl... |
| Description |
256K x 16 Static RAM
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| File Size |
157.64K /
12 Page |
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it Online |
Download Datasheet |
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