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Cypress
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Part No. |
ULTRA37000 37000
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OCR Text |
... X X 100 83 66 Macrocells 32 64 128 192 256 384 512 Dedicated Inputs 5 5 5 5 5 5 5 I/O Pins 32 32/64 64/128 120 128/160/192 160/192 160/192/...macrocell feedbacks from within the logic blocks. The number of PIM inputs increases with pin count ... |
Description |
5V 3.3V, ISR High-Performance CPLDs From old datasheet system
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File Size |
1,182.09K /
65 Page |
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it Online |
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CYPRESS
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Part No. |
CY7C342B-35JC
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OCR Text |
128-macrocell MAX(R) EPLD
Features
128 macrocells in eight logic array blocks (LABs) Eight dedicated inputs, 52 bidirectional I/O pins Programmable interconnect array Advanced 0.65-micron CMOS technology to increase performance * Availabl... |
Description |
128-macrocell MAX® EPLD
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File Size |
327.18K /
14 Page |
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it Online |
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Cypress
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Part No. |
CY7C342B 7C342B
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OCR Text |
128-macrocell MAX(R) EPLD
Features
128 macrocells in 8 LABs 8 dedicated inputs, 52 bidirectional I/O pins Programmable interconnect array Advanced 0.65-micron CMOS technology to increase performance * Available in 68-pin HLCC, PLCC, and P... |
Description |
128-macrocell MAX?EPLD From old datasheet system
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File Size |
198.23K /
13 Page |
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it Online |
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Cypress
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Part No. |
CY7C342 7C342
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OCR Text |
....
fax id: 6103
CY7C342
128-macrocell MAX(R) EPLDs
Features
* * * * * 128 macrocells in 8 LABs 8 dedicated inputs, 52 bidirectional I/O pins Programmable interconnect array 0.8-micron double-metal CMOS EPROM technology Available i... |
Description |
128-macrocell MAX?EPLDs From old datasheet system
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File Size |
18.66K /
1 Page |
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it Online |
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Xilinx
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Part No. |
XCR5128C DS042
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OCR Text |
...LICATION NOTE
R
XCR5128C: 128 Macrocell CPLD with Enhanced Clocking
0 14*
DS042 (v1.3) October 9, 2000
Product Specification
Features
* * * Industry's first TotalCMOSTM PLD - both CMOS design and process technologies Fast Z... |
Description |
with Enhanced Clocking From old datasheet system
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File Size |
338.66K /
19 Page |
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it Online |
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Lattice Semiconductor Corporation
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Part No. |
MACH445-20YC
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OCR Text |
...149.1 jtag testing capability n 128 macrocells n 12 ns t pd n 83 mhz f cnt n 70 inputs with pull-up resistors n 64 outputs n 192 flip-flops 128 macrocell flip-flops 64 input flip-flops n up to 20 product terms per function, with xor n fle... |
Description |
High-Density EE CMOS Programmable Logic
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File Size |
212.52K /
28 Page |
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it Online |
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Price and Availability
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