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  500ps Datasheet PDF File

For 500ps Found Datasheets File :: 591    Search Time::1.172ms    
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    Integrated Device Technology, Inc.
Part No. 9248YG-185LFT
OCR Text ...i skew: 1-4ns  pci ? pci skew: 500ps  cpu ? cpu skew: 175ps  cpu jitter: 250ps (cyc-cyc)  pci jitter: 500ps (cyc-cyc) buffer_in pll2 pll1 spread spectrum 48mhz cpuclk1 sdram (4:1) pciclk (1:0) 2 2 4 sdram0/_f cpuclk0/_f pciclk_f x1 x2 x...
Description 133.33 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 4.40 MM, 0.65 MM PITCH, ROHS COMPLIANT, TSSOP-28

File Size 127.40K  /  12 Page

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    Integrated Device Technology, Inc.
Part No. 9248YF-112-T
OCR Text ...66 ? 3v66: <175ps  pci ? pci: <500ps  cpu-sdram<500ps  for group skew specifications, please refer to group timing relationship table. functionality pin configuration 48-pin 300mil ssop * these inputs have a 120k pull up to vdd. 1. th...
Description PROC SPECIFIC CLOCK GENERATOR, PDSO48 0.300 INCH, SSOP-48

File Size 202.08K  /  12 Page

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    Pericom Semiconductor Corp.
Part No. PI6C410BAE
OCR Text ...-cycle 48mhz clock jitter ? < 500ps cycle-to-cycle pci clock jitter ? < 125ps cycle-to-cycle src clock jitter ? < 1000ps cycle-to-cycle ref clock jitter skew performance ? < 100ps output to output cpu clock skew ? < 500ps output t...
Description Clock Generator for Intel PCI-Express Server Chipset

File Size 304.21K  /  15 Page

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    Pericom Semiconductor Corp.
Part No. PI6C410MAAEX PI6C410MAE
OCR Text ...cycle 48 mhz clock jitter ? < 500ps cycle-to-cycle pci clock jitter ? < 125ps cycle-to-cycle src clock jitter ? < 1000ps cycle-to-cycle ref clock jitter skew performance ? < 100ps output-to-output cpu 0/1 clock skew ? < 150ps outp...
Description Clock Generator for Intel PCI Express Mobile Chipset

File Size 500.93K  /  21 Page

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    MC88916 MC88916DW MC88916DWR2

Motorola, Inc
Part No. MC88916 MC88916DW MC88916DWR2
OCR Text ...Q0-Q2) With Output-Output Skew <500ps and Six Outputs Total (Q0-Q2, Q3, 2X_Q,) With <1ns Skew Each Being Phase and Frequency Locked to the SYNC Input * The Phase Variation From Part-to-Part Between SYNC and the `Q' Outputs Is Less Than 600...
Description LOW SKEW CMOS PLL CLOCK DRIVER WITH PROCESSOR RESET

File Size 112.11K  /  9 Page

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    Maxim Integrated Products, Inc.
Part No. DS1995
OCR Text ...0C 140 mhz. pll clock jitter is 500ps p-p typical relative to the input reference. when an external coast signal is presented, the pll maintains its output frequency in the absence of hsync. a sampling phase adjustment is provided. data, h...
Description 16Kbit Memory iButton(4K位存储器按钮)

File Size 43.44K  /  4 Page

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    Linear Technology, Corp.
Part No. LTC1689CSTRPBF LTC1689ISPBF LTC1689ISTRPBF LTC1688CSTR LTC1688ISTR
OCR Text ... n low channel-to-channel skew: 500ps typ n hot swap tm capable n 50mbps operation with v dd = 3v n low t plh /t phl skew: 500ps typ n driver outputs maintain high impedance in three-state or with power off n short-circuit protected: 3ma...
Description 100Mbps RS485 Hot Swapable Quad Drivers; Package: SO; No of Pins: 16; Temperature Range: 0&deg;C to 70&deg;C QUAD LINE DRIVER, PDSO16
100Mbps RS485 Hot Swapable Quad Drivers; Package: SO; No of Pins: 16; Temperature Range: -40&deg;C to 85&deg;C QUAD LINE DRIVER, PDSO16
100Mbps RS485 Hot Swapable Quad Drivers; Package: SO; No of Pins: 18; Temperature Range: -40&deg;C to 85&deg;C QUAD LINE DRIVER, PDSO16

File Size 219.89K  /  12 Page

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    ISL54216EVAL1Z ISL54216IRTZ ISL54216IRTZ-T ISL54216IRUZ-T ISL54216

Intersil Corporation
Part No. ISL54216EVAL1Z ISL54216IRTZ ISL54216IRTZ-T ISL54216IRUZ-T ISL54216
OCR Text ..., RL = 45, CL = 10pF, tR = tF = 500ps at 480Mbps, (Duty Cycle = 50%) (see Figure 6) 4 FN7701.0 September 27, 2010 ISL54216 Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: VDD = +3.0V, GND = 0V, VC0H, VC1H = 1.4V, ...
Description USB 2.0 High-Speed/UART Dual SP3T (Dual 3 to 1 Multiplexer)

File Size 890.42K  /  17 Page

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    ISL55112 ISL55112IRTZ

Intersil Corporation
Part No. ISL55112 ISL55112IRTZ
OCR Text ...between channels of better than 500ps. The ISL55112 is available in 24 Ld exposed pad TQFN package and is specified for operation over the full -40C to +85C temperature range. ISL55112 Features * 2 Horizontal Row Drivers (High Curren...
Description High-Speed Dual Precision CCD Driver

File Size 353.85K  /  20 Page

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    ASM5I2304AF-1-08-SR ASM5I2304AG-1-08-SR ASM5P2304A ASM5P2304AF-1-08-SR ASM5I2304AF-1-08-ST ASM5P2304AF-1-08-ST ASM5I2304

ON SEMICONDUCTOR
PulseCore Semiconductor
Part No. ASM5I2304AF-1-08-SR ASM5I2304AG-1-08-SR ASM5P2304A ASM5P2304AF-1-08-SR ASM5I2304AF-1-08-ST ASM5P2304AF-1-08-ST ASM5I2304AF-1H-08-SR ASM5P2304AF-1H-08-SR ASM5I2304AF-2H-08-SR ASM5I2304AG-2H-08-SR ASM5P2304AF-2H-08-SR ASM5P2304AG-2H-08-SR ASM5I2304AG-1H-08-SR ASM5I2304AF-1H-08-ST ASM5I2304AF-2H-08-ST ASM5I2304AG-1H-08-ST ASM5I2304AG-2H-08-ST ASM5P2304AF-1H-08-ST ASM5P2304AG-1H-08-ST ASM5P2304AG-1-08-SR ASM5I2304AG-2-08-SR ASM5P2304AG-2-08-SR ASM5P2304AF-2-08-SR ASM5I2304AF-2-08-SR ASM5P2304AF-2H-08-ST ASM5P2304AG-2H-08-ST ASM5I2304AG-1-08-ST ASM5P2304AG-1H-08-SR ASM5I2304AF-2-08-ST ASM5I2304AG-2-08-ST ASM5P2304AF-2-08-ST ASM5P2304AG-2-08-ST ASM5P2304AG-1-08-ST
OCR Text ...s is guaranteed to be less than 500ps. The ASM5P2304A is available in two different Zero input - output propagation delay, adjustable by capacitive load on FBK input. Multiple configurations - Refer "ASM5P2304A Configurations Table". Inp...
Description 2304 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
3.3V Zero Delay Buffer

File Size 359.45K  /  14 Page

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For 500ps Found Datasheets File :: 591    Search Time::1.172ms    
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