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flipflop Datasheet PDF File

For flipflop Found Datasheets File :: 407 Search Time::3.468ms
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				ON Semiconductor
Part No.	MC74VHCT574A-D
OCR Text	flipflop with 3state output fabricated with silicon gate cmos technology. it achieves high speed operation similar to equivalent bipolar schottky ttl while maintaining cmos low power dissipation. this 8bit dtype flipflop is controlled by a ...
Description	Octal D-Type Flip-Flop with 3-State Output
File Size	97.55K / 8 Page	View it Online	Download Datasheet

				Intersil, Corp. Intersil Corporation
Part No.	HS1-82C12RH-8 HS9-82C12RH-8 HS0-82C12RH-Q HS1-82C12RH-Q HS9-82C12RH-Q 5962R9581801V9A HS-82C12RH-00
OCR Text	...MD) is low. The service request flipflop is synchronously set on the negative going edge of STB. Output Buffer Three-state buffers are used to provide output drive for the data latch. A high level on the "output buffer enable" control l...
Description	Radiation Hardened 8-Bit Input/Output Port 8 I/O, PIA-GENERAL PURPOSE, CDFP24
File Size	64.61K / 6 Page	View it Online	Download Datasheet

				Altera Corporation
Part No.	EPM9320ARI208-10
OCR Text	...programmable clock control. The flipflop can also be bypassed for combinatorial operation. During design entry, the user specifies the desired register type; the MAX+PLUS II software then selects the most efficient register operation for ea...
Description	MAX 9000 Programmable Logic Device (PLD) Family; 11/4/2008; MAX II CPLDs
File Size	274.74K / 46 Page	View it Online	Download Datasheet

				IC-Haus GmbH
Part No.	IC-NT IC-NT-SO8
OCR Text	...the CLK leading edge, the first flipflop transfers the DIN data to Q1 and powers up the LED sink. Since the chain is loaded with just one single high bit and DIN is given by the output DOUT of the previous device, input DIN now reads low at...
Description	LIGHT CHAIN PULSE DRIVER
File Size	202.21K / 8 Page	View it Online	Download Datasheet

				IC-Haus GmbH
Part No.	IC-NESO8 IC-NE IC-NEMSOP8
OCR Text	... the clock input CLK. The third flipflop is triggered with the falling clock edge, which produces an artificial delay in order to avoid race conditions when shifting the input data via the serial output to the next device in the chain. The ...
Description	LIGHT-GRID PULSE RECEIVER
File Size	211.98K / 9 Page	View it Online	Download Datasheet

				ON Semiconductor
Part No.	MC74AC174-D
OCR Text	...4/74act174 is a highspeed hex d flipflop. the device is used primarily as a 6bit edgetriggered storage register. the information on the d inputs is transferred to storage during the lowtohigh clock transition. the device has a master reset ...
Description	Hex D Flip-Flop with Master Reset
File Size	105.53K / 12 Page	View it Online	Download Datasheet

				Altera Corporation
Part No.	EP910I EP1810 EP910 EP610 EP610I EP910LC-30
OCR Text	... programmed for D, T, SR, or JK flipflop operation or can be bypassed for combinatorial operation. In addition, macrocell registers can be individually clocked either by a global clock or by any input or feedback path to the AND array. Alte...
Description	CPLD, EP910 Family, ECMOS Process, 450 Gates, 24 Macro Cells, 24 Reg., 24 User I/Os, 5V Supply, 30 Speed Grade, 44LDCC The Altera Classic device family offers a solution to high-speed, lowpower logic integration. Fabricated on advanced CMOS technology
File Size	293.93K / 42 Page	View it Online	Download Datasheet

				Allegro MicroSystems, Inc. ALLEGRO[Allegro MicroSystems]
Part No.	UDN2961B UDN2961W 2961
OCR Text	...RAM +5 V V VCC R RC ONE SHOT S flipflop Q R REF JT 8 SUFFIX 'B', RJT = 6.0C/W REF CIRCUIT R CV V BB 2940 6 + - 4 C SUFFIX 'W', R JA V SENSE = 38C/W LOW TRIP 2 SUFFIX 'B', R JA MODE = 43...
Description	HIGH-CURRENT HALF-BRIDGE PRINTHEAD/MOTOR DRIVER.WITH INTERNAL CURRENT SENSING AND CONTROL 大电流半桥打印头/ DRIVER.WITH内部电流检测和控制电机
File Size	92.45K / 12 Page	View it Online	Download Datasheet

				Altera Corporation
Part No.	EPM9320 EPM9560A EPM9320A EPM9400 EPM9480 EPM9560 MAX900003 EPM9560RC240-15 EPM9320LC84-15 EPM9320LI84-20
OCR Text	...programmable clock control. The flipflop can also be bypassed for combinatorial operation. During design entry, the user specifies the desired register type; the MAX+PLUS II software then selects the most efficient register operation for ea...
Description	Programmable Logic Device Family
File Size	283.66K / 46 Page	View it Online	Download Datasheet

For flipflop Found Datasheets File :: 407 Search Time::3.468ms
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