|
|
 |
TIANMA
|
Part No. |
TM320240CCDSPEC TM320240CCD
|
OCR Text |
...parameters (where two bytes are treated as 1 data item) are handled as follows: a.csrw,csrr:each byte is processed individuallly. the microprocessor may read or write just the low byte of the cursor address. b.system set,scroll,cgram adr... |
Description |
LCD_Module
|
File Size |
319.27K /
22 Page |
View
it Online |
Download Datasheet
|
|
|
 |
QuickLogic
|
Part No. |
QL5432-33APQ208C QL5432-33APQ208I QL5432-33APB456I QL5432-33APB456C
|
OCR Text |
...ma writes. this address must be treated as valid from the beginning of a dma write until the dma write operation is complete. it should be incremented (by 4 bytes) each time data is transferred on the pci bus. mst_rdad[31:0] i address for... |
Description |
33MHz/32-bit PCI master/target with embedded programmable logic and dual port SRAM. ASIC
|
File Size |
376.33K /
20 Page |
View
it Online |
Download Datasheet
|
|

Price and Availability
|