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Microchip
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Part No. |
PL611S-19-Q48GC
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OCR Text |
... programming logic clk1 1 2 3 4 5 6 clk1 gnd fin vdd oe , pdb , fsel clk0 dfn-6l (2. 0 x 1. 3 x 0.6 mm ) sot 23 -6l (3. 0 x 3. 0 x 1...pll clk0 clk1 when clk1=f ref when clk1=clk0 1(default) n/a on on on on on 0 n/... |
Description |
Clock and Timing - Clock Generation
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File Size |
240.84K /
8 Page |
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it Online |
Download Datasheet |
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OKI electronic components
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Part No. |
MSM7578VRS
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OCR Text |
... configuration (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 sgc sg aout v dd dg pdn rsync ain+ ainC gsx (alaw)* ag xsync 16-pin plast...pll and synchronizes all timing signals of the transmit section. this synchronizing signal must be s... |
Description |
Signal rail CODEC
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File Size |
157.40K /
18 Page |
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it Online |
Download Datasheet |
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Cypress
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Part No. |
CY7C2245KV18-450BZXI
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OCR Text |
...8, 2014 36-mbit qdr ? ii+ sram 4-word burst architecture (2.5 cycle read latency) with odt features separate independent read and write da...pll) for accurate data placement configurations with read cycle latency of 2.0 cycles: cy7c2245kv18 ... |
Description |
36-Mbit QDRII SRAM Four-Word Burst Architecture (2.0 Cycle Read Latency) with ODT
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File Size |
643.20K /
28 Page |
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it Online |
Download Datasheet |
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Price and Availability
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