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  any-phy Datasheet PDF File

For any-phy Found Datasheets File :: 2582    Search Time::1.188ms    
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    PM4354 200009 2000091

PMC-Sierra, Inc.
Part No. PM4354 200009 2000091
OCR Text ...RATED ACCESS DEVICE UTOPIA L2/ any-phy UTOPIA L2 PM73124 AAL1gator-4 E1/T1/J1 x 4 to PBX, Video, CODEC PM4354 COMET-QUAD Voice Processing with AAL2 PM7329 S/UNI-APEX1K800 PM7340 S/UNI-IMA-8 PM4354 COMET-QUAD x2 E1/T1/J...
Description From old datasheet system
Four Channel Combined E1/T1/J1 Transceiver/Framer

File Size 22.86K  /  2 Page

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    ADM6996F

INFINEON[Infineon Technologies AG]
Part No. ADM6996F
OCR Text ...ons and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instr...PHY Block ....................................................................................... 3-...
Description 6 port 10/100 Mb/s Single Chip Ethernet Switch Controller

File Size 657.53K  /  69 Page

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    NWK954 NWK954CG NWK954D NWK954GH1N

MITEL[Mitel Networks Corporation]
Part No. NWK954 NWK954CG NWK954D NWK954GH1N
OCR Text ...4 indicates receive activity on any of its 4 twisted pair ports by asserting the local activity output (LACTOUT_N). The LACTOUT_N signals fr...PHY modules in the NWK954 is provided with a unique scrambler seed derived from TA[4:2]. To ensure t...
Description QUAD FAST ETHERNET REPEATER

File Size 172.61K  /  17 Page

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    PM5315

PMC-Sierra, Inc.
PMC[PMC-Sierra, Inc]
PMC-Sierra Inc
Part No. PM5315
OCR Text ...ecomBus Interfaces for grooming any legal mix of SONET/SDH paths. * Supports Automatic Protection Switching (APS): * Ring control port commu...PHY Level 3/ UTOPIA Level 3 DD[31:0], DDP[4:1] DJ0J1[4:1] DPL[4:1] DCK DFP To a DatalinkLayer ...
Description SONET/SDH Payload Extractor/Aligner for 2488 Mbit/s

File Size 44.27K  /  2 Page

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    RTL8201CP RTL8201CP-VD RTL8201CP-VD-LF RTL8201CP-LF

REALTEK
ETC
Part No. RTL8201CP RTL8201CP-VD RTL8201CP-VD-LF RTL8201CP-LF
OCR Text ...eval system, or translated into any language in any form or by any means without the written permission of Realtek Semiconductor Corp. DISCL...PHY Address Configuration, page 19). Add Power dissipation info (Table 31). Bit <0:8> default settin...
Description SINGLE-CHIP/SINGLE-PORT 10/100M FAST ETHERNET PHYCEIVER (With Auto Crossover)

File Size 523.43K  /  38 Page

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    UPD720110 UPD720110AGC-8EA

NEC[NEC]
Part No. UPD720110 UPD720110AGC-8EA
OCR Text ...backward compatible either when any one of downstream ports is connected to an USB 1.1 compliant device, or when the upstream port is connec...PHY CDR SERDES UPC FS_REP SIE_2H ALL_TT F_TIM EP1 EP0 External Serial ROM ROM I/F ROM...
Description MOS INTEGRATED CIRCUIT

File Size 394.06K  /  32 Page

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    UPD720112 UPD720112GK-9EU

NEC[NEC]
Part No. UPD720112 UPD720112GK-9EU
OCR Text ...backward compatible either when any one of the downstream ports is connected to a USB 1.1 compliant device, or when the upstream port is con...PHY CDR SERDES UPC FS_REP SIE_2H ALL_TT F_TIM EP1 EP0 CDR DP(1)_PHY Downstream ...
Description MOS INTEGRATED CIRCUIT

File Size 374.75K  /  32 Page

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    pmc
Part No. 1991271
OCR Text ...e used for OAM cells as well as any other user-generated cells such as AAL5 cells for ATM signaling. UTOPIA INTERFACE * Supports 52 MHz, 8/16-bit Level 2, Multi-Phy Mode (MPHY) with parity, 8/16-bit Level 1, SPHY and 8-bit Level 1, ATM ...
Description From old datasheet system

File Size 27.67K  /  2 Page

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    PMC[PMC-Sierra, Inc]
PMC[PMC-Sierra Inc]
Part No. 1991272 PM73123 PM73123-PI
OCR Text ...e used for OAM cells as well as any other user-generated cells such as AAL5 cells for ATM signaling. * Provides an optional 8/16-bit AnyPHYT...Phy Mode (MPHY) with parity, 8/16-bit Level 1, SPHY and 8-bit Level 1, ATM Master modes. RL_CLK[7...
Description From old datasheet system
8 Link CES/DBCES AAL1 SAR

File Size 24.43K  /  2 Page

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    pmc
Part No. 1991273
OCR Text ...e used for OAM cells as well as any other user-generated cells such as AAL5 cells for ATM signaling. * Provides an optional 8/16-bit AnyPHYT...Phy Mode (MPHY) with parity, 8/ 16-bit Level 1, SPHY and 8-bit Level 1, ATM Master modes. RL_CLK[...
Description From old datasheet system

File Size 23.47K  /  2 Page

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