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Macronix 旺宏
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| Part No. |
MX98713A 98713A
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| OCR Text |
... bus access. When 98713A is the initiator of current bus access, the target must assert DEVSELB within 5 bus cycles, otherwise cycle is aborted. PCI initialization device select: target specific device select signal for configuration cycles... |
| Description |
FAST ETHERNET MAC CONTROLLER
From old datasheet system
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| File Size |
224.44K /
42 Page |
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Macronix 旺宏
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| Part No. |
MX98713 98713
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| OCR Text |
...access. When the MX98713 is the initiator of current bus access, the target must assert DEVSEL# within 5 bus cycles; otherwise, the cycle will be aborted. PCI initialization device select: target specific device select signal for configurat... |
| Description |
PMAC
From old datasheet system
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| File Size |
196.19K /
32 Page |
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it Online |
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agere
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| Part No. |
WL60040
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| OCR Text |
... and duration of a transaction. initiator ready. Indicates that the initiator (master) is ready to complete the data phase. Target ready. Indicates that the target is ready to complete the data phase. Stop. Indicates that the target request... |
| Description |
Controller Miscellaneous
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| File Size |
121.72K /
10 Page |
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it Online |
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TI
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| Part No. |
OMAP5912
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| OCR Text |
...IONS Updated Table 3-56, L3 OCP initiator Registers Table 3-57, MPU Interface (MPUI) Registers: - updated RESET VALUE column - FFFE:C91C - changed REGISTER NAME and DESCRIPTION - added DSP_MISC_CONFIG (FFFE:C920) - added ENHANCED_CTL (FFFE:... |
| Description |
Applications Processor
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| File Size |
2,369.65K /
247 Page |
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it Online |
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Macronix 旺宏
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| Part No. |
MX86200 86200
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| OCR Text |
...mands. IRDY# 26 I This input is initiator RDY#, it is generated from an PCI Bus Master. When it is low, IRDY# indicates that the initiator is able to complete the current bus trans action if and only if the TRDY# is also low. TRDY# 27 STO T... |
| Description |
HIGH PERFORMANCE 64-BIT GUI/VIDEO ACCELERATOR
From old datasheet system
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| File Size |
83.96K /
17 Page |
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it Online |
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Fujitsu
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| Part No. |
MB86606A
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| OCR Text |
...Controller Block: * Operable as initiator and target * WIDE and FAST-20 data transfers Synchronous transfer (max. 40 Mbytes/s: Up to 256 offset values can be set.) Asynchronous transfer (max. 10 Mbytes/s) * 512-byte FIFO register for data p... |
| Description |
FAST-20 SCSI Protocol Controller
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| File Size |
439.81K /
64 Page |
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it Online |
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