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  pll- Datasheet PDF File

For pll- Found Datasheets File :: 29713    Search Time::12.125ms    
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    Cypress
Part No. CY7C2245KV18-450BZXI
OCR Text ...access port phase-locked loop (pll) for accurate data placement configurations with read cycle latency of 2.0 cycles: cy7c2245kv18 ? 1 m 36 functional description the cy7c2245kv18 is 1.8 v synchronous pipelined sram, equipped with qdr ii+...
Description 36-Mbit QDRII SRAM Four-Word Burst Architecture (2.0 Cycle Read Latency) with ODT

File Size 643.20K  /  28 Page

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    Cypress
Part No. CY7C2163KV18-450BZXI CY7C2163KV18-550BZXI CY7C2165KV18-450BZC CY7C2165KV18-550BZC
OCR Text ...access port phase-locked loop (pll) for accurate data placement configurations with read cycle latency of 2.5 cycles: cy7c2163kv18 ? 1 m 18 cy7c2165kv18 ? 512 k 36 functional description the cy7c2163kv18, and cy7c2165kv18 are 1.8 v synch...
Description 18-Mbit QDRII SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT

File Size 626.68K  /  30 Page

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    MT8940-1 MT8940AE

Mitel Semiconductor
MITEL[Mitel Networks Corporation]
Part No. MT8940-1 MT8940AE
OCR Text PLL Features * * Provides T1 clock at 1.544 MHz locked to input frame pulse Sources CEPT (30+2) Digital Trunk/ST-BUS clock and timing signals locked to internal or external 8 kHz signal TTL compatible logic inputs and outputs Uncommitte...
Description ISO-CMOS ST-BUS FAMILY T1/CEPT Digital Trunk PLL
ISO-CMOS ST-BUS⑩ FAMILY T1/CEPT Digital Trunk PLL

File Size 132.04K  /  19 Page

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    MT8940AC MT8940AE

Mitel Semiconductor
MITEL[Mitel Networks Corporation]
Part No. MT8940AC MT8940AE
OCR Text PLL Features * * Provides T1 clock at 1.544 MHz locked to input frame pulse Sources CEPT (30+2) Digital Trunk/ST-BUS clock and timing signals locked to internal or external 8 kHz signal TTL compatible logic inputs and outputs Uncommitte...
Description T1/CEPT Digital Trunk PLL

File Size 204.10K  /  16 Page

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    MT8940 MT8940AE

MITEL[Mitel Networks Corporation]
Part No. MT8940 MT8940AE
OCR Text PLL Features * * Provides T1 clock at 1.544 MHz locked to input frame pulse Sources CEPT (30+2) Digital Trunk/ST-BUS clock and timing signals locked to internal or external 8 kHz signal TTL compatible logic inputs and outputs Uncommitte...
Description ISO-CMOS ST-BUSFAMILY T1/CEPT Digital Trunk PLL
ISO-CMOS ST-BUS FAMILY T1/CEPT Digital Trunk PLL
ISO-CMOS ST-BUS⑩ FAMILY T1/CEPT Digital Trunk PLL

File Size 116.52K  /  16 Page

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    MT8941B MT8941BE MT8941BP

MITEL[Mitel Networks Corporation]
Part No. MT8941B MT8941BE MT8941BP
OCR Text PLL Features * * Provides T1 clock at 1.544 MHz locked to an 8 kHz reference clock (frame pulse) Provides CEPT clock at 2.048 MHz and ST-BUS clock and timing signals locked to an internal or external 8 kHz reference clock Typical inhere...
Description CMOS ST-BUS⑩ FAMILY Advanced T1/CEPT Digital Trunk PLL
CMOS ST-BUS FAMILY Advanced T1/CEPT Digital Trunk PLL

File Size 130.44K  /  22 Page

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    MT8941 MT8941AE MT8941AP

MITEL[Mitel Networks Corporation]
Part No. MT8941 MT8941AE MT8941AP
OCR Text PLL Features * * Provides T1 clock at 1.544 MHz locked to an 8 kHz reference clock (frame pulse) Provides CEPT clock at 2.048 MHz and STBUS clock and timing signals locked to an internal or external 8 kHz reference clock Typical inheren...
Description CMOS ST-BUS⑩ FAMILY Advanced T1/CEPT Digital Trunk PLL
CMOS ST-BUS FAMILY Advanced T1/CEPT Digital Trunk PLL

File Size 246.12K  /  18 Page

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