| PART |
Description |
Maker |
| ISL6293 ISL6293-2CR-T ISL6293-2CR ISL6293-2CRZ ISL |
Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset 14-SOIC -40 to 85
Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset 14-PDIP -40 to 85
Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset 14-SO -40 to 85 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO10
Li-ion/Li Polymer Battery Charger Accepting Two Power Sources
|
Intersil, Corp.
INTERSIL[Intersil Corporation]
|
| 74VHC112MTC |
Dual J-K Flip-Flops with Preset and Clear
|
ON Semiconductor
|
| MM74C73 MM74C73N MM74C76M MM74C76N |
Dual J-K Flip-Flops with Clear and Preset
|
FAIRCHILD[Fairchild Semiconductor]
|
| HD74HC76 HD74HC76FPEL HD74HC76P |
Dual J-K Flip-Flops (with Preset and Clear)
|
Renesas Electronics Corporation
|
| HD74HC74FPEL HD74HC74TELL HD74HC74 HD74HC74P |
Dual D-type Flip-Flops (with Preset and Clear)
|
Renesas Electronics Corporation
|
| M27W201-80K6TR M27W201-200NZ6TR M27W201-80NZ6TR M2 |
2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
Test Spring Probe; Current Rating:3A; Leaded Process Compatible:Yes; Length:0.060"; Peak Reflow Compatible (260 C):No; Tip/Nozzle Style:90 Concave RoHS Compliant: Yes 2兆位56Kb × 8低压紫外线可擦写可编程只读存储器和OTP存储
Triple 3-Input Positive-AND Gates 14-SO 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-SO 0 to 70
Triple 3-Input Positive-AND Gates 14-PDIP 0 to 70
Triple 3-Input Positive-AND Gates 14-SOIC 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-SOIC 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-PDIP 0 to 70
2 Mbit 256Kb x 8 Low Voltage UV EPROM and OTP EPROM
2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
|
STMicroelectronics N.V.
意法半导
STMICROELECTRONICS[STMicroelectronics]
ST Microelectronics
|
| MC10135 MC10135FN MC10135L MC10135P ON0571 |
Replaced by SN54LS175 : Quadruple D-type Flip-Flops With Clear 16-CFP -55 to 125 10K SERIES, POSITIVE EDGE TRIGGERED JBAR-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
Replaced by SN54LS175 : Quadruple D-type Flip-Flops With Clear 16-CDIP -55 to 125 10K SERIES, POSITIVE EDGE TRIGGERED JBAR-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
Dual J-K Master-Slave Flip-Flop
PIN ASSIGNMENT
From old datasheet system
|
Motorola Mobility Holdings, Inc.
Motorola, Inc.
ONSEMI[ON Semiconductor]
|
| PO74G74ASIR PO74G74ASIU PO74G74ASR PO74G74ASU |
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
|
Potato Semiconductor Corporation
|
| HD74LV2G74A |
Single D-ype Flip Flops with Preset and Clear
Single D-type Flip Flops with Preset and Clear
|
HITACHI[Hitachi Semiconductor]
|
