| PART |
Description |
Maker |
| CY7C1461AV33-100AXC CY7C1463AV33-100AXC CY7C1461AV |
36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL垄芒 Architecture
36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL Architecture(带NoBL结构6-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM) 36兆位米x 36 / 2 M中的x 18/512K × 72）流体系结构，通过与总线延迟（带总线延迟结构的的36 - Mbit通过的SRAM100万x 36 / 2 M中的x 18/512K × 72）流的SRAM
|
Cypress Semiconductor Corp.
|
| CY7C1387F-167BGC CY7C1387F-167BGI CY7C1387F-167BGX |
Replacement for Intersil part number 8100604EA. Buy from authorized manufacturer Rochester Electronics.
18-Mbit (512K x 36/1 Mbit x 18) Pipelined DCD Sync SRAM 1M X 18 CACHE SRAM, 2.6 ns, PBGA165
18-Mbit (512K x 36/1 Mbit x 18) Pipelined DCD Sync SRAM 1M X 18 CACHE SRAM, 3 ns, PBGA165
18-Mbit (512K x 36/1 Mbit x 18) Pipelined DCD Sync SRAM 18兆位（为512k × 36 / 1兆位× 18）流水线双氰胺同步静态存储器
|
Cypress Semiconductor Corp.
|
| CY7C1354CV25-225AXI CY7C1354CV25-167AXI CY7C1356CV |
9-Mbit (256K x 36/512K x 18) Pipelined SRAM with NoBL™ Architecture
9-Mbit ( 256K x 36/512K x 18 ) Pipelined SRAM with NoBL-TM Architecture 9兆位56 × 36/512K × 18）流水线的SRAM的总线延迟TM架构
9-Mbit ( 256K x 36/512K x 18 ) Pipelined SRAM with NoBL-TM Architecture 9兆位56 × 36/512K × 18）流水线的SRAM的总线延迟，TM架构
|
Cypress Semiconductor Corp.
|
| A28F400BX-B |
4-MBIT (512K x8) Boot Block Flash Memory(4兆位(512K x8) 引导块闪速存储器)
|
Intel Corp.
|
| CY7C1012DV33-10BGXI |
12-Mbit (512K X 24) Static RAM; Density: 12 Mb; Organization: 512Kb x 24; Vcc (V): 3.0 to 3.6 V; 512K X 24 STANDARD SRAM, 10 ns, PBGA119
|
Cypress Semiconductor, Corp.
|
| CY7C1386D-200AXI CY7C1387F-167BGC CY7C1387F-167BGI |
18-Mbit (512K x 36/1 Mbit x 18) Pipelined DCD Sync SRAM
|
Cypress Semiconductor
|
| CY7C1370DV25 |
18-Mbit (512K x 36/1M x 18) Pipelined SRAM with NoBL Architecture(18-Mb (512K x 36/1M x 18)管道式SRAM（NoBL结构 18兆位（为512k × 36/1M × 18）与总线延迟建筑18 MB的（12k × 36/1M × 18）管道式静态存储器（总线延迟结构）流水线的SRAM
|
Cypress Semiconductor Corp.
|
| CY7C1371D |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL Architecture(18-Mb (512K x 36/1M x 18)流通式SRAM（NoBL结构 18兆位（为512k × 36/1M × 18）流体系结构，通过与总线延迟18 MB的（12k × 36/1M × 18）流通式的SRAM（总线延迟结构）的SRAM
|
Cypress Semiconductor Corp.
|
| CY7C1363C-133BZC CY7C1363C-100BZI CY7C1363C-100BGC |
9-Mbit (256K x 36/512K x 18) Flow-Through SRAM 512K X 18 CACHE SRAM, 6.5 ns, PBGA165
9-Mbit (256K x 36/512K x 18) Flow-Through SRAM 512K X 18 CACHE SRAM, 8.5 ns, PBGA165
9-Mbit (256K x 36/512K x 18) Flow-Through SRAM 512K X 18 CACHE SRAM, 8.5 ns, PBGA119
|
Cypress Semiconductor, Corp.
CYPRESS SEMICONDUCTOR CORP
|
| CY7C1464AV33-167BGXI CY7C1464AV33-200BGXC CY7C1462 |
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBLArchitecture 512K X 72 ZBT SRAM, 3.4 ns, PBGA209
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBLArchitecture 512K X 72 ZBT SRAM, 3.2 ns, PBGA209
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBLArchitecture 2M X 18 ZBT SRAM, 2.6 ns, PBGA165
2M X 18 ZBT SRAM, 3.2 ns, PQFP100
|
Cypress Semiconductor, Corp.
CYPRESS SEMICONDUCTOR CORP
|
