| PART |
Description |
Maker |
| NC7WV07P6X NC7WV07 NC7WV07L6X |
TinyLogic ULP-A Dual Buffer (Open Drain Output) AUP/ULP/V SERIES, DUAL 1-INPUT NON-INVERT GATE, DSO6
|
Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
|
| NC7WV16P6X NC7WV16 NC7WV16L6X |
TinyLogic ULP-A Dual Buffer
TinyLogicR ULP-A Dual Buffer
|
FAIRCHILD[Fairchild Semiconductor]
|
| NC7WV17 |
TinyLogic ULP-A Dual Buffer with Schmitt Trigger Input
|
Fairchild
|
| NC7SPU04P5X NC7SPU04 NC7SPU04L6X |
TinyLogic ULP Unbuffered Inverter HC/UH SERIES, 1-INPUT INVERT GATE, DSO6
TinyLogic ULP Unbuffered Inverter
TinyLogic ULP Unbuffered Inverter
|
Fairchild Semiconductor, Corp.
Fairchild Semiconductor Corporation
FAIRCHILD[Fairchild Semiconductor]
|
| NC7WP125 NC7WP125L8X NC7WP125K8X |
TinyLogic ULP Buffer with 3-STATE Output
|
ON Semiconductor
|
| NC7SP125 |
TinyLogic???? ULP Buffer with 3-STATE Output
From old datasheet system
|
Fairchild
|
| NC7SP158L6X NC7SP158P6X NC7SP158 |
TinyLogic ULP 2-Input Inverting Multiplexer P SERIES, 2 LINE TO 1 LINE MULTIPLEXER, INVERTED OUTPUT, DSO6
TinyLogic ULP 2-Input Inverting Multiplexer
TinyLogic ULP 2-Input Inverting Multiplexer
|
Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
|
| NC7WZ07P6X NC7WZ07 NC7WZ07L6X |
TinyLogic UHS Dual Buffer (Open Drain Outputs) LVC/LCX/Z SERIES, DUAL 1-INPUT NON-INVERT GATE, PDSO6
TinyLogic UHS Dual Buffer (Open Drain Outputs)
TinyLogic UHS Dual Buffer (Open Drain Outputs)
|
Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
|
| NC7WP86L8X NC7WP86 NC7WP86K8X |
TinyLogic ULP Dual 2-Input Exclusive OR Gate
|
FAIRCHILD[Fairchild Semiconductor]
|
| NC7WZ17 |
TinyLogic UHS Dual Buffer with Schmitt Trigger Inputs(TinyLogic瓒?????缂?????藉??硅Е???杈??))
|
Fairchild Semiconductor Corporation
|
| NC7SP08 NC7SP08L6X NC7SP08P5X |
TinyLogic ULP 2-Input AND Gate
TinyLogic ULP 2-Input AND Gate
|
FAIRCHILD[Fairchild Semiconductor]
|
