| PART |
Description |
Maker |
| CY2PP3220AI CY2PP3220AIT CY2PP3220 |
Dual 1:10 Differential Clock/Data Fanout Buffer
Dual 1:10 Differential Clock / Data Fanout Buffer 2PP SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52
|
CYPRESS[Cypress Semiconductor]
Cypress Semiconductor, Corp.
|
| 74279PC 74155PC 7439PC 7432PC 7473PC 7438PC 7432DC |
S-R-Type Latch
Anything-to-LVPECL/LVDS Translators with Pin-Selectable Divide-by-Four
LVTTL/TTL/CMOS-to-Differential LVECL/ECL Translators
DirectDrive Video Amplifier with Reconstruction Filter and Analog Switch
Quad 2-input NAND Gate
Quad 2-input OR Gate
Decoder/Driver
Dual 4-input NOR Gate
Ultra-Low-Power, Low-Cost Comparators with 2% Reference
Hex Buffer
1:2 Differential PECL/ECL/LVPECL/LVECL Clock and Data Driver
J-K-Type Flip-Flop
2.5V Video Amplifier with Reconstruction Filter
1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers
Differential LVPECL/LVECL/HSTL Receiver/Drivers
16-Input Digital Multiplexer 16输入数字复接
1:5 Differential LVPECL/LVECL/HSTL Clock and Data Driver 16输入数字复接
1:10 Differential LVPECL/LVECL/HSTL Clock and Data Drivers 十六进制逆变
2-To-4-Line Demultiplexer 2线复用器
|
Rochester Electronics, LLC
TE Connectivity, Ltd.
|
| MAX9320EUA-T MAX9320AEKA-T |
2.25 V to 3.8 V, 1:2 differential LVPECL/LVECL/HSTL clock and data driver
1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers 9320 SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
|
MAXIM - Dallas Semiconductor
Maxim Integrated Products, Inc.
|
| AND8090 AND8090D MC100H601 MC100H601FN MC10H106FN |
3.3V / 5V ECL Quad 2-Input Differential AND/NAND
5V ECL Low Impedance Driver
LOW VOLTAGE DUAL 1:4, 1:5 DIFFERENTIAL FANOUT BUFFER
8 Input Priority Encoder
3.3V ECL Triple D-Type Flip-Flop with Set and Reset
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V Dual Differential LVPECL to LVTTL Translator
3.3V / 5V ECL 6-Bit Differential Register with Master Reset
3.3V ECL 1:15 Differential ÷1/÷2 Clock Driver
Fibre Channel Coaxial Cable Driver and Loop Resillency Circuit
3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
3.3V / 5V ECL 8-Bit Synchronous Binary Up Counter
2.5 V/3.3 V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider with Reset and OLS
3.3V / 5V Programmable PLL Synthesized Clock Generator (25 to 400 MHz)
2.5 V/3.3 V SiGe 1:2 Differential Clock Driver with RSECL Outputs
2.5 V/3.3 V SiGe 1:10 Differential Clock Driver with RSECL Outputs
Triple 4-3-3-Input NOR Gate
9-Bit ECL-TTL Translator
AC Characteristics of ECL Devices
|
Motorola
ONSEMI[ON Semiconductor]
|
| NB6L239 NB6L239MN NB6L239MNR2 |
2.5 V / 3.3 V Any Differential Clock IN to Differential LVPECL OUT 1/2/4/8, 2/4/8/16 Clock Divider
From old datasheet system
2.5 V / 3.3V Any Differential Clock IN to Differential LVPECL OUT Dual Bank 1/2/4/8 and 2/4/8/16 Div
2.5 V / 3.3 V Any Differential Clock IN to Differential LVPECL OUT ±1/2/4/8, ±2/4/8/16 Clock Divider
2.5 V / 3.3 V Any Differential Clock IN to Differential LVPECL OUT ÷1/2/4/8, ÷2/4/8/16 Clock Divider
|
ONSEMI[ON Semiconductor]
|
| NBSG53A-D |
2.5V/3.3V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider with Reset and OLS*
|
ON Semiconductor
|
| ICS831742I |
Differential Clock/Data Multiplexer
|
Integrated Device Technology, Inc.
|
| ICS831721I 831721AGILFT |
Differential Clock/Data Multiplexer
|
http://
Integrated Device Technology
|
| PO100HSTL11A PO100HSTL11ASR PO100HSTL11ASU PO100HS |
1 to 2 Differential Clock/Data Fanout Buffer
|
Potato Semiconductor Corporation
|
| NB6L611MNG |
2.5V / 3.3V 1:2 Differential LVPECL Clock / Data Fanout Buffer 6L SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC16
|
ON Semiconductor
|
| MAX9315 |
1:5 Differential LVPECL/LVECL/HSTL Clock and Data Driver
|
MAXIM - Dallas Semiconductor
|
