| PART |
Description |
Maker |
| CY7C1168V18-400BZXC CY7C1168V18-375BZXC CY7C1168V1 |
1M X 18 DDR SRAM, 0.45 ns, PBGA165 13 X 15 MM, 1.40 MM HEIGHT, LEAD FREE, MO-216, FBGA-165
18-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 1M X 18 DDR SRAM, 0.45 ns, PBGA165
2M X 8 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
CYPRESS SEMICONDUCTOR CORP
|
| CY7C1316BV18 CY7C1318BV18 CY7C1916BV18 CY7C1320BV1 |
18-Mbit DDR-II SRAM 2-Word Burst Architecture(2字Burst结构,18-Mbit DDR-II SRAM) 18兆位的DDR - II SRAM字突发架构（2字突发结18 -兆位的DDR - II SRAM的）
18-Mbit DDR-II SRAM 2-Word Burst Architecture(2瀛?urst缁??,18-Mbit DDR-II SRAM)
|
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
|
| K4H560838E-TC/LB0 K4H560838E-TC/LA2 K4H560838E-TC/ |
DDR SDRAM 256Mb E-die (x4, x8) 256Mb的DDR SDRAM的电子芯片（了x4，x8
Quad Wide Bandwidth High Output Drive Single Supply Op Amp 16-PDIP -40 to 125
256Mb E-die DDR SDRAM Specification 66 TSOP-II
Dual Micropower Precision Low-Voltage Operational Amplifier 8-SOIC -55 to 125
10-Bit, 32 kSPS ADC Serial Out, uProcessor Periph./Standalone, 11 Ch. 20-PLCC
10-Bit, 32 kSPS ADC Serial Out, uProcessor Periph./Standalone, 11 Ch. 20-PDIP
DDR SDRAM 256Mb E-die (x4, x8)
|
Samsung Semiconductor Co., Ltd.
SAMSUNG SEMICONDUCTOR CO. LTD.
|
| CY7C1568KV18-550BZXC |
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| GS8662S36GE-250I |
72Mb Burst of 2 DDR SigmaSIO-II SRAM 2M X 36 DDR SRAM, 0.45 ns, PBGA165
|
GSI Technology, Inc.
|
| CY7C1568KV18-500BZXC CY7C1568KV18-500BZC CY7C1570K |
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 DDR SRAM, 0.45 ns, PBGA165
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 2M X 36 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
CYPRESS SEMICONDUCTOR CORP
|
| CY7C1528V18-167BZC CY7C1528V18-167BZI CY7C1528V18- |
8M X 9 DDR SRAM, 0.5 ns, PBGA165 15 X 17 MM, 1.40 MM HEIGHT, LEAD FREE, MO-216, FBGA-165
8M X 9 DDR SRAM, 0.45 ns, PBGA165 15 X 17 MM, 1.40 MM HEIGHT, LEAD FREE, MO-216, FBGA-165
72-Mbit DDR-II SRAM 4-Word Burst Architecture
|
Cypress Semiconductor, Corp.
|
| CY7C1992BV18-167BZXC CY7C1992BV18-300BZC CY7C1992B |
18-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 2M X 9 DDR SRAM, 0.5 ns, PBGA165
18-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 2M X 9 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| IS61DDB22M36-250M3 IS61DDB22M36-250M3L IS61DDB22M3 |
72 Mb (2M x 36 & 4M x 18) DDR-II (Burst of 2) CIO Synchronous SRAMs
2M X 36 DDR SRAM, 0.35 ns, PBGA165
|
Integrated Silicon Solution, Inc
INTEGRATED SILICON SOLUTION INC
|
| M470L3324DU0-LB0 M470L2923DV0-LB0 M470L2923DV0-LB3 |
DDR SDRAM Unbuffered Module 18 4 pin Unbuffered Module based on 512Mb D-die 66 TSOP-II & 54 sTSOP-II with Pb-Free (RoHS compliant) DDR SDRAM的缓冲模8 4针缓冲模块的512MBD为基础的模6 TSOP-II
DDR SDRAM Unbuffered Module 18 4 pin Unbuffered Module based on 512Mb D-die 66 TSOP-II & 54 sTSOP-II with Pb-Free (RoHS compliant) DDR SDRAM的缓冲模18 4针缓冲模块的512MB的D为基础的模6 TSOP-II
DDR SDRAM Unbuffered Module 18 4 pin Unbuffered Module based on 512Mb D-die 66 TSOP-II & 54 sTSOP-II with Pb-Free (RoHS compliant)
|
Samsung Semiconductor Co., Ltd.
SAMSUNG SEMICONDUCTOR CO. LTD.
|
