| PART |
Description |
Maker |
| OP7702 OP77BRCMDA OP77AJMDA OP77AZMDA OP77 OP77EJ |
Next Generation OP07 Ultralow Offset Voltage Operational Amplifier
|
Analog Devices
|
| OP77AJ_883C OP77AZ_883C OP77BRC_883C 5962-8773802G |
Next Generation OP07 Ultralow Offset Voltage Operational Amplifier
|
Analog Devices
|
| AD8599NBSP |
Dual Ultralow Distortion, Ultralow Noise Op Amp
|
Analog Devices
|
| AD8597 |
Single, Ultralow Distortion, Ultralow Noise Op Amp
|
Analog Devices
|
| AD797 AD797AN AD797AR AD797AR-REEL AD797AR-REEL7 A |
Ultralow Distortion, Ultralow Noise Op Amp OP-AMP, 60 uV OFFSET-MAX, 110 MHz BAND WIDTH, PDSO8
Ultralow Distortion, Ultralow Noise Op Amp OP-AMP, 180 uV OFFSET-MAX, 110 MHz BAND WIDTH, PDSO8
Ultralow Distortion/ Ultralow Noise Op Amp
|
http://
ANALOG DEVICES INC
Analog Devices, Inc.
|
| ADXL346ACCZ ADXL346ACCZ-RL ADXL346ACCZ-RL7 EVAL-AD |
3-Axis, ±2 g/±4 g/±8 g/±16 g Ultralow Power DIgital Accelerometer
3-Axis, 卤2 g/卤4 g/卤8 g/卤16 g Ultralow Power DIgital Accelerometer
3-Axis, 隆戮2 g/隆戮4 g/隆戮8 g/隆戮16 g Ultralow Power DIgital Accelerometer
|
Analog Devices
|
| XC4VLX40 XC4VLX100 XC4VLX15 XC4VLX160 XC4VLX200 XC |
High-performance logic applications solution
Virtex-4⑩ Family / newest generation FPGA
VIRTEX-4⒙ FAMILY / NEWEST GENERATION FPGA
Virtex-4??Family / newest generation FPGA
Virtex-4 Family / newest generation FPGA
Virtex-4?/a> Family / newest generation FPGA
|
XILINX[Xilinx, Inc]
http://
|
| MC100LVEL39 MC100LVEL39DW MC100EL39 MC100EL39DW ON |
±2/4,±4/6 Clock Generation Chip
From old datasheet system
2/4 /4/6 Clock Generation Chip
2/44/6 Clock Generation Chip
2/4,4/6 Clock Generation Chip
|
MOTOROLA[Motorola, Inc]
MOTOROLA[Motorola Inc]
|
| M5LV-256_104-10VC M5LV-256_104-10VI M5LV-256_104-1 |
7ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
20ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
12ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
15ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
|
LATTICE[Lattice Semiconductor]
|
| LT6202CS5 LT6202CS8 LT6203CS8 LT6202 LT6204 LT6204 |
Rail-to-Rail Input and Output, Ultralow 1.9n Root Hz Noise, Low Power Op Amps
Single/Dual/Quad 100MHz, Rail-to-Rail Input and Output, Ultralow 1.9nVrtHz Noise, Low Power Op Amps
|
http://
Linear Technology Corporation
LINER[Linear Technology]
|
| ADP3333ARM-3-REEL ADP3333ARM-3-REEL7 ADP3333ARM-1. |
3 V FIXED POSITIVE LDO REGULATOR, 0.23 V DROPOUT, PDSO8 ULTRA SMALL, MSOP-8
High Accuracy Ultralow I<SUB>Q</SUB>, 300 mA, anyCAP® Low Dropout Regulator
High Accuracy Ultralow IQ, 300 mA, anyCAP® Low Dropout Regulator
|
Analog Devices, Inc.
|
| MC100EP139 MC100EP139DW MC100EP139DWR2 MC100EP139D |
±2/4, ±4./5/6 Clock Generation Chip
From old datasheet system
2/4 4./5/6 Clock Generation Chip
|
ONSEMI[ON Semiconductor]
|
