| PART |
Description |
Maker |
| LTC242409 LTC2424CG LTC2428IGTRPBF |
4-/8-Channel 20-Bit mPower No Latency DSTM ADCs
4-/8-Channel 20-Bit µPower No Latency Delta-Sigma ADC; Package: SSOP; No of Pins: 28; Temperature Range: -40°C to 85°C 8-CH 20-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO28
|
Linear Technology, Corp.
|
| LTC2415-1 LTC2415 LTC2415IGN LTC2415CGN LTC2415-1C |
24-Bit No Latency ADCs with Differential Input and Differential Reference
24-Bit No Latency Delta Sigma ADC with Differential Input and Differential Reference
24-Bit No Latency Delta Sigma ADC with Differential Input, 50/60Hz Rejection
|
LINER[Linear Technology]
|
| LTC2430 LTC2431 LTC2431CMS LTC2430CGN LTC2431IMS L |
20-Bit No Latency Delta-Sigma ADCs with Differential Input and Differential Reference
20-Bit No Latency Delta Sigma with Differential Input, 50/60Hz Rejection, SSOP-16
20-Bit No Latency Delta Sigma with Differential Input, 50/60Hz Rejection, MS10
|
LINER[Linear Technology]
|
| LTC2439-1CGN LTC2439-1IGN LTC2439-1 |
8-/16-Channel 16-Bit No Latency Delta-Sigma ADC
8-/16-Channel 16-Bit No Latency Delta-Sigma ADC 16-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO28
|
Linear Technology, Corp.
Linear Technology Corporation
|
| AK4390 AK4390EF |
Ultra Low Latency 32-Bit ツヒ DAC
|
Asahi Kasei Microsystems
|
| LTC2411 2411I |
24 Bit No Latency ADC
From old datasheet system
|
Linear
|
| LTC1861 LTC1860 LTC1861CS8 LTC1861CMS LTC1861IMS L |
5V, 2-Ch 12-bit, 250ksps, Serial Interface, MSOP
5V, 12-bit, 250ksps Differential Input ADC, MSOP, Serial Interface
mPower, 12-Bit, 250ksps 1- and 2-Channel ADCs in MSOP
|
Linear Technology
|
| LTC2436-1 LTC2440 LTC2436-1CGN LTC2436-1IGN |
2-Channel Differential Input 16-Bit No Latency DS ADC
|
Linear Technology
|
| LTC2433-1 |
Differential Input 16-Bit No Latency Delta Sigma ADC
|
Linear
|
| CAT93C46AJ CAT93C46AJI CAT93C46AJI-2.5 CAT93C46AJ- |
72-Mbit QDR™-II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency)
72-Mbit QDR™-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency)
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency)
256K (32K x 8) Static RAM
256 Kb (256K x 1) Static RAM
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)
Microwire Serial EEPROM 微型导线串行EEPROM
|
Atmel, Corp.
|
