| PART |
Description |
Maker |
| CY7C1380C-200AC CY7C1380C-200BGC CY7C1380C-167AC C |
Memory : Sync SRAMs
PUSHBUTTON, METAL, FLAT, 22MM 5A; Switch function type:NC/NO Mom; Voltage, contact AC max:250V; Temp, op. max:55(degree C); Temp, op. min:-20(degree C); Diameter, panel cut-out:22.2mm; Length / Height, external:32mm; Dielectric RoHS Compliant: Yes
18-Mb (512K x 36/1M x 18) Pipelined SRAM 1M X 18 CACHE SRAM, 2.8 ns, PBGA165
18-Mb (512K x 36/1M x 18) Pipelined SRAM 1M X 18 CACHE SRAM, 2.6 ns, PBGA165
18-Mb (512K x 36/1M x 18) Pipelined SRAM 512K X 36 CACHE SRAM, 2.8 ns, PBGA165
18-Mb (512K x 36/1M x 18) Pipelined SRAM 512K X 36 CACHE SRAM, 3 ns, PQFP100
18-Mb (512K x 36/1M x 18) Pipelined SRAM 512K X 36 CACHE SRAM, 2.8 ns, PQFP100
18-Mb (512K x 36/1M x 18) Pipelined SRAM 512K X 36 CACHE SRAM, 3.4 ns, PQFP100
|
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
|
| CY7C1992CV18-200BZC CY7C1992CV18-200BZI CY7C1992CV |
18-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
512K X 36 DDR SRAM, 0.45 ns, PBGA165
|
CYPRESS SEMICONDUCTOR CORP
|
| CY7C1372CV25-167AI CY7C1372CV25-167BGI CY7C1372CV2 |
512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 1M X 18 ZBT SRAM, 3 ns, PQFP100
512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 1M X 18 ZBT SRAM, 3 ns, PBGA165
512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 1M X 18 ZBT SRAM, 3 ns, PBGA119
512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 1M X 18 ZBT SRAM, 2.8 ns, PBGA119
512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 1M X 18 ZBT SRAM, 2.8 ns, PBGA165
512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 512K X 36 ZBT SRAM, 3 ns, PBGA165
512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 512K X 36 ZBT SRAM, 3 ns, PQFP100
512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 512K X 36 ZBT SRAM, 3.4 ns, PQFP100
512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 512K X 36 ZBT SRAM, 3.4 ns, PBGA165
512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 12k × 36/1M × 18流水线的SRAM架构的总线延迟
CAP,Ceramic,10000pF,500VDC,10-% Tol,10% Tol,X7R-TC Code,-15,15%-TC,30ppm-TC RoHS Compliant: Yes
512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture
|
Cypress Semiconductor, Corp.
Cypress Semiconductor Corp.
|
| WPS512K32-15PJC WPS512K32-15PJI WPS512K32-17PJC WP |
512K x 8 SRAM, 15ns
512K x 8 SRAM, 17ns
512K x 8 SRAM, 20ns
512K x 8 SRAM, 25ns
|
White Electronic Designs
|
| GS74108J-15 GS74108TP-8I GS74108J-8I GS74108TP-15 |
512K x 8 4Mb Asynchronous SRAM 12k × 8 4Mb的异步SRAM
512K X 8 STANDARD SRAM, 8 ns, PDSO36 0.400 INCH, SOJ-36
512K X 8 STANDARD SRAM, 8 ns, PDSO44 0.400 INCH, TSOP2-44
|
GSI Technology, Inc.
Electronic Theatre Controls, Inc.
List of Unclassifed Manufacturers
|
| CY14B108M-ZSP20XC CY14B108K CY14B108K-ZS20XC CY14B |
1M X 8 NON-VOLATILE SRAM, 20 ns, PDSO44
8 Mbit (1024K x 8/512K x 16) nvSRAM with Real Time Clock; Organization: 1Mb x 8; Vcc (V): 2.7 to 3.6 V; Density: 8 Mb; Package: TSOP
512K X 16 NON-VOLATILE SRAM, 45 ns, PDSO54 ROHS COMPLIANT, TSOP2-54
512K X 16 NON-VOLATILE SRAM, 25 ns, PDSO54 ROHS COMPLIANT, TSOP2-54
512K X 16 NON-VOLATILE SRAM, 20 ns, PDSO54 ROHS COMPLIANT, TSOP2-54
|
CYPRESS SEMICONDUCTOR CORP
Cypress Semiconductor, Corp.
|
| M38230G4-XXXFP M38230G4-XXXHP M38231G4-XXXHP M3823 |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 3.1 to 3.6 V
18-Mbit (512K x 36/1M x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 512Kb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
|
Renesas Electronics Corporation.
Renesas Electronics, Corp.
|
| AS5SP512K18DQ AS5SP512K18DQ-30ET AS5SP512K18DQ-30I |
512K X 18 CACHE SRAM, 4 ns, PQFP100
Plastic Encapsulated Microcircuit 9Mb, 512K x 18, Synchronous SRAM Pipeline Burst, Single Cycle Deselect
|
MICROSS COMPONENTS
Austin Semiconductor
|
| AS7C4096 AS7C34096-15JC AS7C34096-10JC AS7C34096-1 |
5V/3.3V 512K X8 CMOS SRAM 512K X 8 STANDARD SRAM, 12 ns, PDSO36
High Speed CMOS Logic Dual Retriggerable Monostable Multivibrators with Reset 16-TSSOP -55 to 125 512K X 8 STANDARD SRAM, 20 ns, PDSO44
High Speed CMOS Logic Dual Retriggerable Monostable Multivibrators with Reset 16-TSSOP -55 to 125 512K X 8 STANDARD SRAM, 20 ns, PDSO36
Dual 4-Input Positive-AND Gate 14-TVSOP -40 to 85 512K X 8 STANDARD SRAM, 12 ns, PDSO44
Dual 4-Input Positive-AND Gate 14-SOIC -40 to 85 512K X 8 STANDARD SRAM, 12 ns, PDSO36
TV 12C 8#20 4#16 SKT PLUG 512K X 8 STANDARD SRAM, 10 ns, PDSO36
Dual 4-Input Positive-AND Gate 14-TSSOP -40 to 85 512K X 8 STANDARD SRAM, 20 ns, PDSO44
DUAL MONOSTABLE MULTIVIBRATORS 16-SOIC -40 to 85 512K X 8 STANDARD SRAM, 20 ns, PDSO44
Dual 4-Input Positive-AND Gate 14-SO -40 to 85 512K X 8 STANDARD SRAM, 15 ns, PDSO36
Dual 4-Input Positive-AND Gate 14-TSSOP -40 to 85 512K X 8 STANDARD SRAM, 15 ns, PDSO44
TV 26C 26#20 PIN WALL RECP 512K X 8 STANDARD SRAM, 10 ns, PDSO44
TV 5C 5#16 PIN WALL RECP
SRAM - 5V Fast Asynchronous
|
Alliance Semiconductor, Corp.
ALSC[Alliance Semiconductor Corporation]
|
| CY7C1371D-100AXI CY7C1371D-100BGI CY7C1373D-100BZI |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 1M X 18 ZBT SRAM, 8.5 ns, PQFP100
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 18兆位（为512k × 36/1M × 18）流体系结构，通过与NoBLTM的SRAM
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 1M X 18 ZBT SRAM, 8.5 ns, PBGA165
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 1M X 18 ZBT SRAM, 6.5 ns, PBGA119
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 512K X 36 ZBT SRAM, 8.5 ns, PBGA165
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 1M X 18 ZBT SRAM, 6.5 ns, PQFP100
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 1M X 18 ZBT SRAM, 6.5 ns, PBGA165
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 512K X 36 ZBT SRAM, 8.5 ns, PBGA119
|
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
|
| CY7C1423AV18-250BZC |
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 2M X 18 DDR SRAM, 0.45 ns, PBGA165
|
Analog Integrations, Corp.
|
| IS61LV5128-10 IS61LV5128-10B IS61LV5128-10BI IS61L |
IC,SRAM,512KX8,CMOS,TSOP,44PIN,PLASTIC
512K x 8 HIGH-SPEED CMOS STATIC RAM 512K X 8 STANDARD SRAM, 15 ns, PDSO44
512K x 8 HIGH-SPEED CMOS STATIC RAM 512K X 8 STANDARD SRAM, 15 ns, PBGA36
512K x 8 HIGH-SPEED CMOS STATIC RAM 512K X 8 STANDARD SRAM, 15 ns, PDSO36
512K x 8 HIGH-SPEED CMOS STATIC RAM 512K X 8 STANDARD SRAM, 10 ns, PBGA36
512K x 8 HIGH-SPEED CMOS STATIC RAM 512K X 8 STANDARD SRAM, 10 ns, PDSO36
|
ISSI[Integrated Silicon Solution, Inc]
ISSI [Integrated Silicon Solution, Inc]
ISSI[Integrated Silicon Solution Inc]
Integrated Silicon Solution Inc
Integrated Silicon Solution, Inc.
|
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