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CY7C1266KV18 - 36-Mbit DDR II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)

CY7C1266KV18_280499.PDF Datasheet
 Full text search : 36-Mbit DDR II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)

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