PART |
Description |
Maker |
ISPLSI1032EA-170LT100 ISPLSI1032EA-200LT100 1032EA |
60 MHz in-system prommable high density PLD 170 MHz in-system prommable high density PLD 125 MHz in-system prommable high density PLD 100 MHz in-system prommable high density PLD Shielded Paired Cable; Number of Conductors:8; Conductor Size AWG:24; No. Strands x Strand Size:7 x 32; Jacket Material:Polyethylene; Shielding Material:Aluminum Foil/Polyester Tape/Tinned Copper Braid; Number of Pairs:4 RoHS Compliant: Yes In-System Programmable High Density PLD 在系统可编程高密度可编程逻辑器件
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LATTICE[Lattice Semiconductor] Lattice Semiconductor Corporation Lattice Semiconductor, Corp.
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ISPLSI2064VE ISPLSI2064VE-100LB100 ISPLSI2064VE-10 |
3.3V In-System Programmable High Density SuperFAST?PLD 3.3VIn-SystemProgrammableHighDensitySuperFASTPLD 3.3V In-System Programmable High Density SuperFASTPLD EE PLD, 7 ns, PQFP44 CRYSTAL 16.0 MHZ 20PF SMD EE PLD, 13 ns, PQFP100 CRYSTAL 20.0 MHZ 20PF SMD RES 180K-OHM 1% 0.063W 200PPM THK-FILM SMD-0402 TR-7-PA2MM 3.3V In-System Programmable High Density SuperFAST PLD 3.3V In-System Programmable High Density SuperFAST⑩ PLD 3.3V In-System Programmable High Density SuperFAST?/a> PLD 280 MHz 3.3V in-system prommable superFAST high density PLD
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Lattice Semiconductor, Corp. Lattice Semiconductor Corporation LATTICE[Lattice Semiconductor]
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ISPLSI2192VE-135LT128 ISPLSI2192VE-180-L-T128 ISPL |
3.3V In-System Programmable SuperFAST High Density PLD 3.3V In-System Programmable SuperFAST⑩ High Density PLD 3.3VIn-SystemProgrammableSuperFASTHighDensityPLD RELAY SSR 110A 240VAC AC INPUT 3.3V In-System Programmable SuperFASTHigh Density PLD
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LATTICE[Lattice Semiconductor] LatticeSemiconductor Lattice Semiconductor Corporation
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8600V ISPLSI8600V-90LB272 ISPLSI8600V-125LB492 ISP |
3.3V In-System Programmable SuperBIGHigh Density PLD EE PLD, 24 ns, PBGA492 3.3V In-System Programmable SuperBIGHigh Density PLD EE PLD, 24 ns, PBGA272 GT 14C 14#16 SKT RECP LINE EE PLD, 16 ns, PBGA492 3.3V In-System Programmable SuperBIGHigh Density PLD 3.3在系统可编程SuperBIG⑩高密度可编程逻辑器件 3.3V In-System Programmable SuperBIGHigh Density PLD EE PLD, 13.5 ns, PBGA492
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Lattice Semiconductor Corporation Lattice Semiconductor, Corp.
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WP06R WP06R12D05 WP06R12D12 WP06R12D15 WP06R12S05 |
High Density 5-6 Watt Wide Input Range DC/DC Converter 5-6 WATT HIGH DENSITY, WIDE INPUT RANGE DC/DC CONVERTER 5-6 WATT HIGH DENSITY/ WIDE INPUT RANGE DC/DC CONVERTER RECTIFIER SCHOTTKY SINGLE 2A 40V 50A-Ifsm 0.55Vf 0.5A-IR PowerDI-123 3K/REEL
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CANDD[C&D Technologies]
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81080V ISPLSI81080V-60LB272 ISPLSI81080V-90LB492 I |
3.3V In-System Programmable SuperBIG High Density PLD 3.3V In-System Programmable SuperBIGHigh Density PLD EE PLD, 14.5 ns, PBGA492 3.3V In-System Programmable SuperBIGHigh Density PLD 3.3在系统可编程SuperBIG⑩高密度可编程逻辑器件
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Lattice Semiconductor Corporation Lattice Semiconductor, Corp.
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ISPLSI5512VA-70LB388 ISPLSI5512VA-70LB272 ISPLSI55 |
Electrically-Erasable Complex PLD In-System Programmable 3.3V SuperWIDEHigh Density PLD In-System Programmable 3.3V SuperWIDE High Density PLD In-System Programmable 3.3V SuperWIDE?High Density PLD
|
Lattice Semiconductor Corporation
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ISPLSI5512VA-100LB272 ISPLSI5512VA-70LQ208 5512VA |
70 MHz in-system prommable 3.3V superWIDE high density PLD In-System Programmable 3.3V SuperWIDE⑩ High Density PLD In-System Programmable 3.3V SuperWIDE High Density PLD 110 MHz in-system prommable 3.3V superWIDE high density PLD
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LATTICE[Lattice Semiconductor]
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ISOPAC01 ISOPAC0103 ISOPAC0104 ISOPAC0111 ISOPAC01 |
High Current High density Isolated Silicon Power Rectifier(????靛?600V锛?ぇ?垫?锛??瀵?害锛??绂诲?锛??????存??? High Current High density Isolated Silicon Power Rectifier(????靛?1000V锛?ぇ?垫?锛??瀵?害锛??绂诲?纭?????娴??) High-Current Isolated Rectifier Assemblies. 150 V-1000 V. 10 nS - 2 microseconds 大电流隔离整流器大会150 V000五,10纳秒- 2微秒 HIGH CURRENT ISOLATED RECTIFIER ASSEMBLY High Current High density Isolated Silicon Power Rectifier(????靛?1000V锛?ぇ?垫?锛??瀵?害锛??绂诲?锛??????存???
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International Rectifier, Corp. Semtech Corporation
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ISPLSI5256VA ISPLSI5256VA-70LB208 ISPLSI5256VA-70L |
In-System Programmable 3.3V SuperWIDE?/a> High Density PLD In-System Programmable 3.3V SuperWIDE??High Density PLD In-System Programmable 3.3V SuperWIDEHigh Density PLD
|
Lattice Semiconductor Corporation
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M38230G4-XXXFP M38230G4-XXXHP M38231G4-XXXHP M3823 |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V 36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 2.4 to 2.6 V 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 3.1 to 3.6 V 18-Mbit (512K x 36/1M x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 2.4 to 2.6 V 72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 3.1 to 3.6 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 512Kb x 72; Vcc (V): 3.1 to 3.6 V 72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 3.1 to 3.6 V 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机 72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机 SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机 72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机 Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
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Renesas Electronics Corporation. Renesas Electronics, Corp.
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