PART |
Description |
Maker |
NC7WV07P6X NC7WV07 NC7WV07L6X |
TinyLogic ULP-A Dual Buffer (Open Drain Output) AUP/ULP/V SERIES, DUAL 1-INPUT NON-INVERT GATE, DSO6
|
Fairchild Semiconductor, Corp. FAIRCHILD[Fairchild Semiconductor]
|
NC7WV04P6X NC7WV04 NC7WV04L6X NC7WV04P6XNL |
TinyLogic ULP-A Dual Inverter AUP/ULP/V SERIES, DUAL 1-INPUT INVERT GATE, PDSO6 TinyLogic ULP-A Dual Inverter AUP/ULP/V SERIES, DUAL 1-INPUT INVERT GATE, DSO6
|
Fairchild Semiconductor, Corp. FAIRCHILD[Fairchild Semiconductor]
|
74AUP2G04GM115 |
Low-power dual inverter; Package: SOT886 (XSON6); Container: Tape reel smd AUP/ULP/V SERIES, DUAL 1-INPUT INVERT GATE, PDSO6
|
NXP Semiconductors N.V.
|
74AUP1G14GS |
Low-power Schmitt trigger inverter AUP/ULP/V SERIES, 1-INPUT INVERT GATE, PDSO6
|
NXP Semiconductors N.V.
|
74AUP1G18GM 74AUP1G18GS 74AUP1G18GW |
Low-power 1-of-2 demultiplexer with 3-state deselected output AUP/ULP/V SERIES, 1 LINE TO 2 LINE MULTIPLEXER, TRUE OUTPUT, PDSO6
|
NXP Semiconductors N.V.
|
74AUP1G3208 74AUP1G3208GW125 74AUP1G3208GF |
Low-power 3-input OR-AND gate; Package: SOT363 (SC-88); Container: Tape reel smd, Reverse AUP/ULP/V SERIES, 3-INPUT OR-AND GATE, PDSO6 Low-power 3-input OR-AND gate
|
NXP Semiconductors N.V.
|
74AUP1G17GM-H |
AUP/ULP/V SERIES, 1-INPUT NON-INVERT GATE, PDSO6
|
NXP SEMICONDUCTORS
|
74AUP1G80 74AUP1G80GW 74AUP1G80GW125 74AUP1G80GM 7 |
Low-power D-type flip-flop; positive-edge trigger; Package: SOT353-1 (TSSOP5); Container: Reel Pack, Reverse, Reverse AUP/ULP/V SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, INVERTED OUTPUT, PDSO5
|
NXP Semiconductors N.V.
|
NC7WP240L8X NC7WP240 NC7WP240K8X |
TinyLogic ULP Dual Inverting Buffer with 3-STATE Outputs
|
FAIRCHILD[Fairchild Semiconductor]
|
NC7WV17 |
TinyLogic ULP-A Dual Buffer with Schmitt Trigger Input
|
Fairchild
|
NC7WP07 NC7WP07L6X NC7WP07P6X FAIRCHILDSEMICONDUCT |
TinyLogic-R ULP Dual Buffer (Open Drain Output) (Preliminary) TinyLogic ULP Dual Buffer (Open Drain Output) (Preliminary)
|
Fairchild Semiconductor
|