| PART |
Description |
Maker |
| NB4L339MNG NB4L339MNR2G NB4L33907 |
2.5 V / 3.3 V Differential 2:1 Clock IN to Differential LVPECL Clock Generator / Divider / Fan−Out Buffer
|
ON Semiconductor
|
| ICS9DB202 ICS9DB202CF ICS9DB202CFLF ICS9DB202CFLFT |
From old datasheet system
Two 0.7V current mode differential HCSL output pairs, 1 differential clock input
|
http://
ICST[Integrated Circuit Systems]
|
| MAX9320EUA-T MAX9320AEKA-T |
2.25 V to 3.8 V, 1:2 differential LVPECL/LVECL/HSTL clock and data driver
1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers 9320 SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
|
MAXIM - Dallas Semiconductor
Maxim Integrated Products, Inc.
|
| NB6L572M NB6L572MMNG NB6L572MMNR4G |
6L SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC32
2.5V / 3.3V Differential 4:1 Mux to 1:2 CML Clock/Data Fanout / Translator
2.5V / 3.3V Differential 4:1 Mux to 1:2 CML Clock/Data Fanout / Translator
|
ON Semiconductor
|
| MC100ELT23 MC100EL12DTR2 MC10H131FNR2 MC100H640FNR |
5V Dual Differential PECL to TTL Translator
5V ECL Low Impedance Driver
Dual Type D Master-Slave Flip-Flop
ECL/TTL Clock Driver
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V / 5V ECL ÷4 Divider
Quad 2-Input NOR Gate
3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset
3.3V / 5V Hex Differential Line Receiver / Driver
3.3V / 5V Triple ECL Input to LVPECL/PECL Output Translator
|
ON Semiconductor
|
| MC100EP01 MC10EP445 MC10H172FNR2 MC100EL29 MC100H6 |
3.3V / 5V ECL 4-Input OR/NOR
3.3V / 5VECL 8-Bit Serial/Parallel Converter
Dual Binary 1-4-Decoder (High)
5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset
9-Bit TTL-ECL Translator
Quad TTL-ECL Translator
Dual 2-Wide 2-3-Input OR-AND/OR-AND-Invert Gate
3.3V / 5V ECL 8-Bit Synchronous Binary Up Counter
3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
3.3V 10-bit LVTTL/LVCMOS to LVPECL Translator
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
5V ECL Voltage Controlled Oscillator
3.3V ECL D-Type Flip-Flop with Set and Reset
Binary to 1-8 Decoder (Low)
Differential -5V ECL To TTL Translator
-3.3V / -5V Triple ECL Input to PECL Output Translator
5V ECL Dual Differential 2:1 Multiplexer
Quad MSTR
5V ECL Quad 4-Input OR/NOR Gate
3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset
Dual 4-5-Input OR/NOR
|
ON Semiconductor
|
| MAX9312 MAX9314 MAX9312ECJ |
Dual 1:5 Differential LVPECL/LVECL/HSTL Clock and Data Drivers LOW SKEW CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
Dual 1:5 Differential LVPECL/ LVECL/HSTL Clock and Data Drivers
|
Maxim Integrated Products, Inc.
MAXIM - Dallas Semiconductor
|
| ICS8737-11 ICS8737AG-11 ICS8737AG-11T |
LOW SKEW ±1/±2 DIFFERENTIAL-TO- 3.3V LVPECL CLOCK GENERATOR 低偏差1 / ± 2差分.3V的LVPECL时钟发生
LOW SKEW / DIFFERENTIAL-TO- 3.3V LVPECL CLOCK GENERATOR
LOW SKEW ÷1/÷2 DIFFERENTIAL-TO- 3.3V LVPECL CLOCK GENERATOR
|
NXP Semiconductors N.V.
Integrated Circuit Systems
|
| NBSG53A NBSG53AMN NBSG53AMNR2 NBSG53ABAR2 NBSG53AB |
2.5V/3.3V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider with Reset and OLS
|
ONSEMI[ON Semiconductor]
|
| IDTCSPT857CPAI IDTCSPT857CPFI |
2.5V - 2.6V PHASE LOCKED LOOP DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER
2.5V - 2.6V PHASE LOCKED LOOP DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
|
Integrated Device Technology, Inc.
|
| NB4L339 |
Clock IN to Differential LVPECL Clock Generator
|
ON Semiconductor
|
| HDMP-1637A |
HDMP-1637A · 1.25 GBd SerDes Circuit with Differential PECL Clock Inputs for Gigabit Ethernet Applications
Gigabit Ethernet SerDes Circuit with Differential PECL Clock Inputs
|
Agilent (Hewlett-Packard)
Agilent(Hewlett-Packard)
|
