PART |
Description |
Maker |
IDT71P74104S167BQ IDT71P74104S200BQ IDT71P74104S25 |
1.8V 512K x 36 QDR II PipeLined SRAM 1.8V 2M x 9 QDR II PipeLined SRAM 1.8V 1M x 18 QDR II PipeLined SRAM 1.8V 2M x 8 QDR II Pipelined SRAM 18Mb Pipelined QDR II SRAM Burst of 4
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IDT http://
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CY7C1303AV25-100BZC CY7C1306AV25-100BZC CY7C1303AV |
Memory : Sync SRAMs 18-Mb Burst of 2 Pipelined SRAM with QDR(TM) Architecture 18-Mb Burst of 2 Pipelined SRAM with QDR⑩ Architecture 18-Mb Burst of 2 Pipelined SRAM with QDR Architecture 18-Mb Burst of 2 Pipelined SRAM with QDR?/a> Architecture
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Cypress Semiconductor
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GS8160Z18T-200 GS8160Z18BT-250 GS8160Z18BT-150 GS8 |
18Mb Burst SRAMs 18Mb Pipelined and Flow Through Synchronous NBT SRAM
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GSI[GSI Technology]
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IDT71P73204 IDT71P73204167BQ IDT71P73804 IDT71P738 |
18Mb Pipelined DDR垄芒II SRAM Burst of 4 18Mb Pipelined DDR?⑸I SRAM Burst of 4 18Mb Pipelined DDR?II SRAM Burst of 4
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Integrated Device Technology Integrated Device Techn...
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BBS-15 BBS-1/4 BBS-2/10 BBS-1-8/10 BBS-10 BBS-1-6/ |
72-Mbit QDR-II SRAM 2-Word Burst Architecture 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture 72-Mbit DDR-II SRAM 2-Word Burst Architecture 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture 36-Mbit QDR-II SRAM 4-Word Burst Architecture Fuse 256K (32K x 8) Static RAM 64/256/512/1K/2K/4K x 18 Synchronous FIFOs Low-Voltage 64/256/512/1K/2K/4K/8K x 9 Synchronous FIFOs Neuron® Chip Network Processor 64-Kbit (8K x 8) Static RAM 72-Mbit QDR™-II SRAM 2-Word Burst Architecture 保险
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NXP Semiconductors N.V.
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CY7C1372CV25-167AI CY7C1372CV25-167BGI CY7C1372CV2 |
512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 1M X 18 ZBT SRAM, 3 ns, PQFP100 512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 1M X 18 ZBT SRAM, 3 ns, PBGA165 512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 1M X 18 ZBT SRAM, 3 ns, PBGA119 512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 1M X 18 ZBT SRAM, 2.8 ns, PBGA119 512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 1M X 18 ZBT SRAM, 2.8 ns, PBGA165 512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 512K X 36 ZBT SRAM, 3 ns, PBGA165 512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 512K X 36 ZBT SRAM, 3 ns, PQFP100 512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 512K X 36 ZBT SRAM, 3.4 ns, PQFP100 512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 512K X 36 ZBT SRAM, 3.4 ns, PBGA165 512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 12k × 36/1M × 18流水线的SRAM架构的总线延迟 CAP,Ceramic,10000pF,500VDC,10-% Tol,10% Tol,X7R-TC Code,-15,15%-TC,30ppm-TC RoHS Compliant: Yes 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture
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Cypress Semiconductor, Corp. Cypress Semiconductor Corp.
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IS61VPS102418A-250B2I IS61LPS102418A-200B2 IS61VPS |
256K x 72, 512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM 1M X 18 CACHE SRAM, 2.6 ns, PBGA119 256Kx72,512Kx36,1024Kx18 18Mb SYNCHRONOUS PIPELINED,SINGLE CYCLE DESELECT STATIC RAM
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Integrated Silicon Solution, Inc. Integrated Silicon Solu...
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GS8160Z18BT-250V GS8160Z18BT-150IV GS8160Z18BT-150 |
18Mb Pipelined and Flow Through Synchronous NBT SRAM
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GSI[GSI Technology]
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GS8162Z72C-200I GS8162Z72C GS8162Z72C-133 GS8162Z7 |
18Mb Pipelined and Flow Through Synchronous NBT SRAM
|
GSI[GSI Technology]
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CAT64LC20ZS CAT64LC20ZP CAT64LC20J-TE7 CAT64LC20J- |
36-Mbit QDR-II SRAM 4-Word Burst Architecture 36-Mbit QDR-II SRAM 2-Word Burst Architecture 9-Mbit (256K x 36/512K x 18) Pipelined SRAM with NoBL Architecture 4-Mbit (128K x 36) Pipelined SRAM with NoBL Architecture 4-Mbit (128K x 36) Flow-through SRAM with NoBL Architecture 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL Architecture SPI Serial EEPROM SPI串行EEPROM 36-Mbit QDR™-II SRAM 2-Word Burst Architecture SPI串行EEPROM 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM SPI串行EEPROM 256K (32K x 8) Static RAM SPI串行EEPROM
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Analog Devices, Inc. Electronic Theatre Controls, Inc.
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CY7C1303BV25-167BZC CY7C1306BV25-167BZC CY7C1303BV |
18-Mbit Burst of 2 Pipelined SRAM with QDR Architecture
|
Cypress Semiconductor
|
CY7C1302V25 7C1302V25 |
9-Mb Pipelined SRAM with QDR?Architecture From old datasheet system
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Cypress
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