| PART |
Description |
Maker |
| AB1811-T3 AB1805-T3 AB1804-T3 AB1814-T3 AB1813-T3 |
The Abracon Corporation AB18XX Real Time Clock with Power Management family provides a groundbreaking combination of ultra-low power coupled with a highly sophisticated feature set.
|
Abracon Corporation
|
| 74LVC1G74GD125 |
Single D-type flip-flop with set and reset; positive edge trigger; Package: SOT996-2 (XSON8U); Container: Reel Pack, Reverse, Reverse LVC/LCX/Z SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8
|
NXP Semiconductors N.V.
|
| 74HC74N652 |
Dual D-type flip-flop with set and reset; positive edge-trigger
|
NXP Semiconductors
|
| KK74LV74 KK74LV74D KK74LV74N |
Dual D-type flip-flop with set and reset; positive-edge trigger
|
KODENSHI KOREA CORP.
|
| IN74LV74 IN74LV74D |
Dual D-type flip-flop with set and reset; positive-edge trigger
|
Integral Corp.
|
| 74LVC74ABQ-Q100 74LVC74AD-Q100 74LVC74APW-Q100 |
Dual D-type flip-flop with set and reset; positive-edge trigger
|
NXP Semiconductors
|
| 74HC74N |
Dual D-type flip-flop with set and reset; positive-edge trigger
|
NXP Semiconductors
|
| 74LVC2G74GT 74LVC2G74 74LVC2G74DC 74LVC2G74DP |
Single D-type flip-flop with set and reset; positive edge trigger
|
PHILIPS[Philips Semiconductors]
|
| 1513 1513SERIES 1513-75Y 1513-135Y 1513-2.5A 1513- |
Delay 50 /-2.5 ns, fixed SIP delay line Td/Tr=5
Delay 80 /-4 ns, fixed SIP delay line Td/Tr=5
Delay 45 /-2.3 ns, fixed SIP delay line Td/Tr=5
Delay 37.5 /-1.9 ns, fixed SIP delay line Td/Tr=5
Delay 22.5 /-1.2 ns, fixed SIP delay line Td/Tr=5
Delay 90 /-4.5 ns, fixed SIP delay line Td/Tr=5
Delay 2.5 /-1 ns, fixed SIP delay line Td/Tr=5
Fixed passive SIP delay line
FIXED SIP DELAY LINE TD/TR = 5 固话SIP延迟线运输署/训练班\u003d 5
Delay 75 /-3.8 ns, fixed SIP delay line Td/Tr=5
Delay 135 /-6.8 ns, fixed SIP delay line Td/Tr=5
Delay 3.5 /-1 ns, fixed SIP delay line Td/Tr=5
Delay 120 /-6 ns, fixed SIP delay line Td/Tr=5
Delay 30 /-1.5 ns, fixed SIP delay line Td/Tr=5
Delay 40 /-2 ns, fixed SIP delay line Td/Tr=5
Delay 25 /-1.3 ns, fixed SIP delay line Td/Tr=5
Delay 60 /-3 ns, fixed SIP delay line Td/Tr=5
Delay 140 /-7 ns, fixed SIP delay line Td/Tr=5
Delay 20 /-1 ns, fixed SIP delay line Td/Tr=5
Delay 5 /-1 ns, fixed SIP delay line Td/Tr=5
Delay 15 /-1 ns, fixed SIP delay line Td/Tr=5
|
Coilcraft, Inc.
Data Delay Devices Inc
|
| 74AUP1G74GN 74AUP1G74GS |
Low-power D-type flip-flop with set and reset; positive-edge trigger
|
NXP Semiconductors
|
| 74AHC74BQ 74AHCT74BQ |
74AHC74; 74AHCT74; Dual D-type flip-flop with set and reset; positive-edge trigger
|
Philips
|
