| PART |
Description |
Maker |
| MC100EL90DW MC100EL90DWG MC100EL90DWR2 MC100EL90DW |
-3.3V / -5V Triple ECL Input to PECL Output Translator; Package: SOIC-20 WB; No of Pins: 20; Container: Rail; Qty per Container: 38 TRIPLE ECL TO PECL TRANSLATOR, COMPLEMENTARY OUTPUT, PDSO20
−3.3V / −5V Triple ECL Input to PECL Output Translator
|
ONSEMI[ON Semiconductor]
|
| AZ10/100EP16VSL AZ100EP16VSD |
ECL/PECL Differential Receiver with Variable Output Swing ECL / PECL的差分接收器输出变秋
|
Arizona Microtek, Inc.
Electronic Theatre Controls, Inc.
|
| AZHEL11 AZM100EL11 AZ100EL11D |
ECL/PECL 1:2 Differential Fanout Buffer ECL / PECL的差:2扇出缓冲
|
Electronic Theatre Controls, Inc.
ETC
|
| AZ100EL31 AZ10EL31 AZ10EL31DR2 AZ100EL31T AZ100EL3 |
ECL/PECL D Flip-Flop with Set and Reset ECL / PECL的D触发器的设置和复
From old datasheet system
|
Electronic Theatre Controls, Inc.
List of Unclassifed Manufacturers
ETC[ETC]
Arizona Microtek
|
| AZ10EL07D AZ100EL07D |
ECL/PECL 2-Input XOR/XNOR ECL / PECL输入异或/异或
|
Arizona Microtek, Inc.
|
| MC100ELT23 MC100EL12DTR2 MC10H131FNR2 MC100H640FNR |
5V Dual Differential PECL to TTL Translator
5V ECL Low Impedance Driver
Dual Type D Master-Slave Flip-Flop
ECL/TTL Clock Driver
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V / 5V ECL ÷4 Divider
Quad 2-Input NOR Gate
3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset
3.3V / 5V Hex Differential Line Receiver / Driver
3.3V / 5V Triple ECL Input to LVPECL/PECL Output Translator
|
ON Semiconductor
|
| MC100ES6039 MC100ES6039EGR2 MC100ES6039DW MC100ES6 |
3.3 V ECL/PECL/HSTL/LVDS /-2/4, /-4/5/6 Clock Generation Chip
3.3V ECL/PECL/HSTL/LVDS 2/4, 4/6 Clock Generation Chip 3.3 ECL / PECL HSTL / LVDS / 44 / 6时钟发生器芯
|
Freescale (Motorola)
FREESCALE[Freescale Semiconductor, Inc]
Freescale Semiconductors
飞思卡尔半导体(中国)有限公司
|
| MC10H109FNR2 MC10H131 MC100EP140 MC100E155FN MC100 |
Dual 4-5-Input OR/NOR Gate
Dual Type D Master-Slave Flip-Flop
3.3V ECL Phase-Frequency Detector
5V ECL 6-Bit 2:1 Mux Latch
5V ECL Differential Data and Clock D Flip-Flop
3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
3.3V ECL 1:15 Differential ÷1/÷2 Clock Driver
ECL/TTL Clock Driver
3.3V / 5V 2-Input Differential AND/NAND
5V ECL 2:1 Multiplexer
3.3V / 5V ECL JK Flip Flop
3.3V ECL 1:4 ÷ 1/÷ 2 Clock Fanout Buffer
3.3V / 5V Hex Differential Line Receiver / Driver
3.3V 10-bit LVTTL/LVCMOS to LVPECL Translator
Dual 2-Bit Adder/Subtractor
|
ON Semiconductor
|
| AN1406 AN1406_D |
DESIGNING WITH PECL (ECL AT 5.0)
|
ON Semiconductor
|
| AZ100LVEL32DG AZ10LVEL32-09 |
ECL/PECL 隆? 2 Divider
ECL/PECL ÷ 2 Divider
|
Arizona Microtek, Inc
|
| SM-A877-FREQ |
Positive ECL (PECL)
|
NEL Frequency Controls, Inc.
|
| AZ100LVEL32NG AZ100LVEL32TG AZ100LVEL32DG |
ECL/PECL ± 2 Divider
ECL/PECL 卤 2 Divider
|
Arizona Microtek, Inc.
|
